PIC16HV540-04I/SS Microchip Technology, PIC16HV540-04I/SS Datasheet - Page 38

• Manufacturer Part Number: PIC16HV540-04I/SS
• Description: IC MCU OTP 512X12 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16HV540-04I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Size: 768B (512 x 12)
• Program Memory Type: OTP
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 15 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Processor Series: PIC16H
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 25 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 8
• Operating Supply Voltage: 3.5 V to 15 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: 309-1016 - ADAPTER 20-SSOP TO 18-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16HV540
7.5
In the PIC16HV540, the Device Reset Timer (DRT)
runs any time the device is powered up. DRT runs from
reset and varies based on oscillator selection (see
Table 7-5).
The DRT provides a fixed 18 ms nominal time-out on
reset. The DRT operates on an internal RC oscillator.
The processor is kept in RESET as long as the DRT is
active. The DRT delay allows Vdd to rise above Vdd
min., and for the oscillator to stabilize.
Oscillator circuits based on crystals or ceramic resona-
tors require a certain time after power-up to establish a
stable oscillation. The on-chip DRT keeps the device in
a RESET condition for approximately 18 ms after the
voltage on the MCLR/V
(V
the MCLR input are not required in most cases, allow-
ing for savings in cost-sensitive and/or space restricted
applications.
The Device Reset time delay will vary from chip to chip
due to V
AC parameters for details.
The DRT will also be triggered upon a Watchdog Timer
time-out, MCLR Reset, Wake-up from SLEEP on Pin
Change and Brown-out Reset. When the external RC
oscillator mode is selected, all DRT periods, after the
initial POR, are 1 ms (typical).
TABLE 7-5:
DS40197B-page 38
Configuration
IH
LP, XT & HS
Oscillator
) level. Thus, external RC networks connected to
EXTRC
DD
Device Reset Timer (DRT)
, temperature, and process variation. See
DRT (DEVICE RESET TIMER
PERIOD)
18 ms (typical)
18 ms (typical)
POR Reset
PP
pin has reach a logic high
18 ms (typical)
1 ms (typical)
Subsequent
Resets
Preliminary
7.6
The PIC16HV540 has on-chip Brown-out Detect cir-
cuitry. If enabled and if the internal power, V
below parameter B
time than parameter T
out condition will reset the chip. A reset is not guaran-
teed if V
eter (T
On resets (Brown-out, Watchdog, MCLR and Wake-up
on Pin Change), the chip will remain in reset until V
rises above B
met the DRT will now be invoked and will keep the chip
in reset an additional 18mS (LP, XT and HS oscillator
modes) or 1mS for EXTRC.
If V
chip will go back into a Brown-out Reset and the DRT
will be re-initialized. Once V
the DRT will execute the specified time period.
Figure 7-11 shows typical Brown-out situations.
The Brown-out Detect circuit can be disabled or
enabled by setting the BODEN bit in the OPTION2
SFR. The Brown-out Detect is disabled upon all Power-
on Resets (POR).
7.6.1
The PIC16HV540 BOD circuitry differs from “conven-
tional” brown-out detect circuitry in that the BOD cir-
cuitry on the PIC16HV540 does not directly detect
“dips” in the external V
internal V
ensures that program execution will halt and a reset
state will be entered into prior to the internal logic
becoming corrupted. The BOD circuit has two select-
able voltage settings, nominally 5V and 3V. Each regu-
lation voltage setting with its associated minimum and
maximum B
tional mode that must be carefully considered.
For the 5V V
is 2.7V
V
primarily intended for use when the PIC16HV540 is
operating at 4Mhz and V
For the 3V V
is 1.8V. This minimum B
V
primarily intended for use when the PIC16HV540 is in
SLEEP. RAM retention is protected by the 1.8V trip
level.
For the regulation and Brown-out circuits to function as
intended the applied V
the regulation voltage setting.
Finally, if the internal brown-out circuit is deemed not to
meet system design requirements then an external
brown-out protection circuit may be required. Microchip
offers a complete family of voltage supervisor products
which can meet most design requirements.
DD
DD
REG
minimum requirements. This operational setting is
minimum requirements. This operational setting is
BOD
.
drops below B
This minimum B
REG
Brown-Out Detect (BOD)
IMPLEMENTING THE ON-CHIP BOD
CIRCUIT
REG
).
VDD
REG
REG
falls below B
VDD
. The functionality of the BOD circuitry
setting, the minimum B
setting, the minimum B
parameters has an intended opera-
. Once the B
VDD
VDD
BOD
DD
DD
(See Section 10.1 ), for greater
VDD
DD
VDD
is nominally 0.5V greater than
VDD
supply voltage but rather the
while the DRT is running, the
2000 Microchip Technology Inc.
(See Table 10-3) the brown-
REG
> 5.5V.
voltage is below the part
for less time than param-
voltage is below the part
VDD
rises above the B
threshold has been
VDD
VDD
parameter
parameter
REG,
VDD
falls
REG
,