ATTINY88-MMU Atmel, ATTINY88-MMU Datasheet

MCU AVR 8K FLASH 12MHZ 28-QFN

ATTINY88-MMU

Manufacturer Part Number
ATTINY88-MMU
Description
MCU AVR 8K FLASH 12MHZ 28-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY88-MMU

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, I2S, SPI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATQT600, ATAVRTS2080B
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY88-MMU
Manufacturer:
ATMEL
Quantity:
2 450
Part Number:
ATTINY88-MMU
Manufacturer:
ATMEL
Quantity:
201
Company:
Part Number:
ATTINY88-MMU
Quantity:
253
Features
High Performance, Low Power AVR
Advanced RISC Architecture
High Endurance Non-volatile Memory Segments
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltage:
Temperature Range:
Speed Grade:
Low Power Consumption
– 123 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– 4K/8K Bytes of In-System Self-Programmable Flash Program Memory
– 64/64 Bytes EEPROM
– 256/512 Bytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data Retention: 20 years at 85°C / 100 years at 25°C
– Programming Lock for Software Security
– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Prescaler, and Compare and Capture Modes
– 6- or 8-channel 10-bit ADC
– Master/Slave SPI Serial Interface
– Byte-oriented 2-wire Serial Interface (Philips I
– Programmable Watchdog Timer with Separate On-Chip Oscillator
– On-Chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– debugWIRE On-Chip Debug System
– In-System Programmable via SPI Port
– Power-On Reset and Programmable Brown-Out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Three Sleep Modes: Idle, ADC Noise Reduction and Power-Down
– On-Chip Temperature Sensor
– 24 Programmable I/O Lines:
– 28 Programmable I/O Lines:
– 1.8
– -40
– 0
– 0
– 0
– Active Mode: 1 MHz, 1.8V: 240 µA
– Power-Down Mode: 0.1 µA at 1.8V
• 28-pin PDIP
• 28-pad QFN/MLF
• 32-lead TQFP
• 32-pad QFN/MLF
• 32-ball UFBGA
°
4 MHz @ 1.8
8 MHz @ 2.7
12 MHz @ 4.5
C to +85
5.5V
°
C
5.5V
5.5V
5.5V
®
8-Bit Microcontroller
2
C Compatible)
8-bit
Microcontroller
with 4/8K Bytes
In-System
Programmable
Flash
ATtiny48/88
Preliminary
Summary
Rev. 8008FS–AVR–06/10

Related parts for ATTINY88-MMU

ATTINY88-MMU Summary of contents

Page 1

Features • High Performance, Low Power AVR • Advanced RISC Architecture – 123 Powerful Instructions – Most Single Clock Cycle Execution – General Purpose Working Registers – Fully Static Operation • High Endurance Non-volatile Memory Segments – ...

Page 2

Pin Configurations Figure 1-1. Pinout of ATtiny48/88 (PCINT19/INT1) PD3 (PCINT20/T0) PD4 (PCINT26) PA2 VCC GND (PCINT27) PA3 (PCINT6/CLKI) PB6 (PCINT7) PB7 (PCINT19/INT1) PD3 (PCINT20/T0) PD4 VCC GND (PCINT6/CLKI) PB6 (PCINT7) PB7 (PCINT21/T1) PD5 NOTE: Bottom pad should be soldered ...

Page 3

Pin Descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port A (PA3:0) (in 32-lead TQFP and 32-pad QFN/MLF packages, only) Port 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit) in ...

Page 4

The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. The various special features of Port D are elaborated ...

Page 5

Overview The ATtiny48/ low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny48/88 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...

Page 6

... The ATtiny48/88 AVR is supported by a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators and evaluation kits. 2.2 Comparison Between ATtiny48 and ATtiny88 The ATtiny48 and ATtiny88 differ only in memory sizes. memory sizes for the two devices. Table 2-1. Device ...

Page 7

... General Information 3.1 Resources A comprehensive set of development tools, application notes and datasheets are available for download at http://www.atmel.com/avr. 3.2 About Code Examples This documentation contains simple code examples that briefly show how to use various parts of the device. These code examples assume that the part specific header file is included before compilation ...

Page 8

Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – ...

Page 9

Address Name Bit 7 (0xBE) TWHSR – (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved – (0xB6) Reserved – (0xB5) Reserved – (0xB4) Reserved – (0xB3) Reserved – (0xB2) Reserved ...

Page 10

Address Name Bit 7 (0x7C) ADMUX – (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved – (0x72) Reserved – (0x71) Reserved – (0x70) Reserved ...

Page 11

Address Name Bit 7 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) Reserved – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) Reserved – 0x13 (0x33) Reserved – 0x12 (0x32) PORTCR BBMD ...

Page 12

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 13

Mnemonics Operands ASR Rd Arithmetic Shift Right SWAP Rd Swap Nibbles BSET s Flag Set BCLR s Flag Clear BST Rr, b Bit Store from Register to T BLD Rd, b Bit load from T to Register SEC Set Carry ...

Page 14

... All packages are Pb-free, halide-free and fully green and they comply with the European directive for Restriction of Hazard- ous Substances (RoHS). 3. These devices can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering informa- tion and minimum quantities. ...

Page 15

... Array), 0.50 mm Pitch 0.6 mm, Ultra Thin, Fine-Pitch Ball Grid Array Package (UFBGA) 32M1-A 32-pad 1.0 body, Lead Pitch 0.50 mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8008F–AVR–06/10 (1) Ordering Code ATtiny88-MMU ATtiny88-MMH ATtiny88-MMHR ATtiny88-PU ATtiny88-AU 5.5 ATtiny88-AUR ATtiny88-CCU ...

Page 16

... Pin TOP VIEW 0.20 b 0.4 Ref BOTTOM VIEW (4x) The terminal # Laser-marked Feature. Note: Package Drawing Contact: packagedrawings@atmel.com ATtiny48/ 0. TITLE 28M1, 28-pad 1.0 mm Body, Lead Pitch 0.45 mm, 2.4 x 2.4 mm Exposed Pad, Thermally Enhanced Plastic Very Thin Quad Flat No Lead Package (VQFN) ...

Page 17

A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 8008F–AVR–06/10 ...

Page 18

PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 ...

Page 19

... A1 BALL CORNER Note1: Dimension “b” is measured at the maximum ball dia plane parallel to the seating plane. Note2: Dimension “b1” is the solderable surface defined by the opening of the solder resist layer. Package Drawing Contact: packagedrawings@atmel.com 8008F–AVR–06/10 Pin TOP VIEW E1 e 32-Øb ...

Page 20

Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 ...

Page 21

Errata 8.1 ATtiny48 8.1.1 Rev known errata. 8.1.2 Rev. B Not sampled. 8.1.3 Rev. A Not sampled. 8008F–AVR–06/10 21 ...

Page 22

... ATtiny88 8.2.1 Rev known errata. 8.2.2 Rev known errata. 8.2.3 Rev. A Not sampled. ATtiny48/88 22 8008F–AVR–06/10 ...

Page 23

... Comparator” on page 158 “Overview” on page 161 “Operation” on page 162 “Starting a Conversion” on page 163 19. 8, added SPH at address 0x3E. Section 22.2 “ATtiny88” on page 3, Port D, adjusted texts ‘sink and source’ adjusted, to fix TBD. 43, updated. 204, updated TBD in notes 5 and 8. 1, “ ...

Page 24

Added sections – – 3. Updated 4. Updated order codes on composition. 9.5 Rev. 8008B - 06/08 1. Updated introduction of 2. Updated 3. Added 9.6 Rev. 8008A - 06/08 1. Initial revision. ATtiny48/88 ...

Page 25

8008F–AVR–06/10 25 ...

Page 26

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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