ATMEGA8515L-8AUR Atmel, ATMEGA8515L-8AUR Datasheet - Page 16

• Manufacturer Part Number: ATMEGA8515L-8AUR
• Description: MCU AVR 8KB FLASH 8MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8515L-8AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -

AVR ATmega8515
Memories
In-System
Reprogrammable Flash
Program memory
16
ATmega8515(L)
This section describes the different memories in the ATmega8515. The AVR architec-
ture has two main memory spaces, the Data Memory and the Program memory space.
In addition, the ATmega8515 features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega8515 contains 8K bytes On-chip In-System Reprogrammable Flash mem-
ory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is
organized as 4K x 16. For software security, the Flash Program memory space is
divided into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega8515 Program Counter (PC) is 12 bits wide, thus addressing the 4K Program
memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in “Boot Loader Support – Read-
While-Write Self-Programming” on page 166. “Memory Programming” on page 179 con-
tains a detailed description on Flash data serial downloading using the SPI pins.
Constant tables can be allocated within the entire Program memory address space, see
the LPM – Load Program memory instruction description.
Timing diagrams for instruction fetch and execution are presented in “Instruction Execu-
tion Timing” on page 13.
Figure 8. Program memory Map
Application Flash Section
Boot Flash Section
$000
$FFF
2512K–AVR–01/10