PIC16F883-I/SP Microchip Technology, PIC16F883-I/SP Datasheet - Page 223

• Manufacturer Part Number: PIC16F883-I/SP
• Description: IC PIC MCU FLASH 4KX14 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F883-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: MSSP/EUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164120-3
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP1631RD-MCC2 - REFERENCE DESIGN MCP1631HVDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.3.2
An overflow (FFh → 00h) in the TMR0 register will set
the T0IF (INTCON<2>) bit. The interrupt can be
enabled/disabled by setting/clearing T0IE (INTCON<5>)
bit. See Section 5.0 “Timer0 Module” for operation of
the Timer0 module.
FIGURE 14-7:
© 2009 Microchip Technology Inc.
IOC-RB0
IOC-RB1
IOC-RB2
IOC-RB3
IOC-RB4
IOC-RB5
IOC-RB6
IOC-RB7
IOCB0
IOCB1
IOCB2
IOCB3
IOCB4
IOCB5
IOCB6
IOCB7
TIMER0 INTERRUPT
INTERRUPT LOGIC
ULPWUIF
ULPWUIE
TMR2IE
TMR1IF
TMR1IE
TMR2IF
CCP1IF
CCP1IE
CCP2IF
CCP2IE
BCLIF
BCLIE
OSFIF
OSFIE
SSPIF
SSPIE
RCIE
RCIF
ADIF
ADIE
TXIF
TXIE
C1IF
C1IE
C2IF
C2IE
EEIF
EEIE
PIC16F882/883/884/886/887
14.3.3
An input change on PORTB change sets the RBIF
(INTCON<0>)
enabled/disabled
(INTCON<3>) bit. Plus, individual pins can be
configured through the IOCB register.
Note:
Note 1:
RBIE
INTF
INTE
RBIF
PEIE
T0IF
T0IE
GIE
PORTB INTERRUPT
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RBIF inter-
rupt
Section 3.4.3 “Interrupt-on-Change” for
more information.
Some peripherals depend upon the
system clock for operation. Since the
system clock is suspended during
Sleep, these peripherals will not wake
the part from Sleep. See Section 14.6.1
“Wake-up from Sleep”.
bit.
flag
by
Wake-up (If in Sleep mode)
The
may
setting/clearing
not
interrupt
DS41291F-page 221
Interrupt to CPU
get
the
set.
can
(1)
RBIE
See
be