PIC18F24J11-I/ML Microchip Technology, PIC18F24J11-I/ML Datasheet - Page 39

• Manufacturer Part Number: PIC18F24J11-I/ML
• Description: IC PIC MCU FLASH 16K 2V 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F24J11-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Embedded Interface Type: EUSART, I2C, SPI
• Rohs Compliant: Yes
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3776 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.4
In addition to the peripheral clock/4 output in certain
oscillator modes, the device clock in the PIC18F46J11
family can also be configured to provide a reference
clock output signal to a port pin. This feature is avail-
able in all oscillator configurations and allows the user
to select a greater range of clock submultiples to drive
external devices in the application.
This reference clock output is controlled by the
REFOCON register (Register 2-3). Setting the ROON
bit (REFOCON<7>) makes the clock signal available
on the REFO (RB2) pin. The RODIV<3:0> bits enable
the selection of 16 different clock divider options.
REGISTER 2-3:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
ROON
R/W-0
Reference Clock Output
The crystal oscillator must be enabled using the FOSC<2:0> bits; the crystal maintains the operation in
Sleep mode.
ROON: Reference Oscillator Output Enable bit
1 = Reference oscillator enabled on REFO pin
0 = Reference oscillator disabled
Unimplemented: Read as ‘0’
ROSSLP: Reference Oscillator Output Stop in Sleep bit
1 = Reference oscillator continues to run in Sleep
0 = Reference oscillator is disabled in Sleep
ROSEL: Reference Oscillator Source Select bit
1 = Primary oscillator used as the base clock
0 = System clock used as the base clock; base clock reflects any clock switching of the device
RODIV<3:0>: Reference Oscillator Divisor Select bits
1111 = Base clock value divided by 32,768
1110 = Base clock value divided by 16,384
1101 = Base clock value divided by 8,192
1100 = Base clock value divided by 4,096
1011 = Base clock value divided by 2,048
1010 = Base clock value divided by 1,024
1001 = Base clock value divided by 512
1000 = Base clock value divided by 256
0111 = Base clock value divided by 128
0110 = Base clock value divided by 64
0101 = Base clock value divided by 32
0100 = Base clock value divided by 16
0011 = Base clock value divided by 8
0010 = Base clock value divided by 4
0001 = Base clock value divided by 2
0000 = Base clock value
U-0
—
REFOCON: REFERENCE OSCILLATOR CONTROL REGISTER (BANKED F3Dh)
W = Writable bit
‘1’ = Bit is set
ROSSLP
R/W-0
ROSEL
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F46J11 FAMILY
RODIV3
(1)
R/W-0
The ROSSLP and ROSEL bits (REFOCON<5:4>)
control the availability of the reference output during
Sleep mode. The ROSEL bit determines if the oscillator
is on OSC1 and OSC2, or the current system clock
source is used for the reference clock output. The
ROSSLP bit determines if the reference source is
available on RB2 when the device is in Sleep mode.
To use the reference clock output in Sleep mode, both
the ROSSLP and ROSEL bits must be set. The device
clock must also be configured for an EC or HS mode;
otherwise, the oscillator on OSC1 and OSC2 will be
powered down when the device enters Sleep mode.
Clearing the ROSEL bit allows the reference output
frequency to change as the system clock changes
during any clock switches.
RODIV2
R/W-0
x = Bit is unknown
RODIV1
R/W-0
DS39932C-page 39
RODIV0
R/W-0
bit 0