PIC18F47J53T-I/ML Microchip Technology, PIC18F47J53T-I/ML Datasheet - Page 90

• Manufacturer Part Number: PIC18F47J53T-I/ML
• Description: IC MCU 8BIT 128KB FLASH 44 QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F47J53T-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: *
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 34
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180029 - BOARD DEMO PIC18F47J53 FS USB
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F47J53 FAMILY
FIGURE 6-6:
DS39964B-page 90
Note 1: These banks also serve as RAM buffers for USB operation. See Section 6.3.1 “USB RAM” for more information.
BSR3:BSR0
= 0000
= 0001
= 0010
= 0011
= 0100
= 0101
= 0110
= 0111
= 1000
= 1001
= 1010
= 1011
= 1100
= 1101
= 1110
= 1111
2: Addresses, EC0h through F5Fh, are not part of the Access Bank. Either the BANKED or the MOVFF instruction should
be used to access these SFRs.
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Bank 6
Bank 7
Bank 8
Bank 9
Bank 10
Bank 11
Bank 12
Bank 13
Bank 14
Bank 15
DATA MEMORY MAP FOR PIC18F47J53 FAMILY DEVICES
C0h
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
60h
Data Memory Map
Non-Access SFR
Non-Access SFR
Access RAM
Access SFRs
GPR, BDT
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Preliminary
(1)
(1)
(2)
(2)
000h
05Fh
060h
0FFh
100h
1FFh
200h
2FFh
300h
3FFh
400h
4FFh
500h
5FFh
600h
6FFh
700h
7FFh
800h
8FFh
900h
9FFh
A00h
AFFh
B00h
BFFh
C00h
CFFh
D00h
DFFh
E00h
EBFh
EC0h
EFFh
F00h
F5Fh
FFFh
When a = 0:
When a = 1:
The BSR is ignored and the
Access Bank is used.
The first 96 bytes are general
purpose RAM (from Bank 0).
The remaining 160 bytes are
Special
(from Bank 15).
The BSR specifies the bank
used by the instruction.
 2010 Microchip Technology Inc.
Access RAM High
Access RAM Low
Access Bank
Function
(SFRs)
Registers
FFh
5Fh
00h
60h