PIC18F2221-I/ML Microchip Technology, PIC18F2221-I/ML Datasheet - Page 11

• Manufacturer Part Number: PIC18F2221-I/ML
• Description: IC PIC MCU FLASH 2KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2221-I/ML

• Core Size: 8-Bit
• Program Memory Size: 4KB (2K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 10-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

9. Module: EUSART
REGISTER 18-3:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 5
bit 4
ABDOVF
R/W-0
The descriptions of the RXDTP and TXCKP bits
(BAUDCON<5:4>) are being revised as shown
below (changes in bold).
RXDTP: Data/Receive Polarity Select bit (Asynchronous mode only)
Asynchronous mode:
1 = Receive data (RX) is inverted (active-low)
0 = Receive data (RX) is not inverted (active-high)
TXCKP: Clock and Data Polarity Select bit
Asynchronous mode:
1 = Idle state for transmit (TX) is a low level
0 = Idle state for transmit (TX) is a high level
Synchronous mode:
1 = Idle state for clock (CK) is a high level
0 = Idle state for clock (CK) is a low level
RCIDL
R-1
BAUDCON: BAUD RATE CONTROL REGISTER (EXCERPT)
W = Writable bit
‘1’ = Bit is set
RXDTP
R/W-0
PIC18F2221/2321/4221/4321
TXCKP
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
BRG16
R/W-0
In this document’s Revision E change, the
Synchronous mode content was removed from the
bit 5 (RXDTP) description.
U-0
—
x = Bit is unknown
R/W-0
WUE
DS80310G-page 11
ABDEN
R/W-0
bit 0