PIC18F26J50-I/SP Microchip Technology, PIC18F26J50-I/SP Datasheet - Page 17

• Manufacturer Part Number: PIC18F26J50-I/SP
• Description: IC PIC MCU FLASH 64K 2V 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26J50-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 16
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3776 B
• Interface Type: EUSART/I2C/SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.2
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. Because the Flash Configuration
Words are stored at the end of program memory, it is
verified with the rest of the code at this time.
The verify process is shown in the flowchart in
Figure 4-2. Memory reads occur a single byte at a time,
so two bytes must be read to compare against the word
in the programmer’s buffer. Refer to Section 4.1
“Read Code Memory” for implementation details of
reading code memory.
FIGURE 4-2:
© 2009 Microchip Technology Inc.
Note:
Verify Code Memory and
Configuration Word
No
Because the Flash Configuration Word
contains the device code protection bit,
code memory should be verified immedi-
ately after writing if code protection is
enabled. This is because the device will not
be readable or verifiable if a device Reset
occurs after the Flash Configuration Words
(and the CP0 bit) have been cleared.
with Post-Increment
with Post-Increment
Set TBLPTR = 0
Read High Byte
Read Low Byte
Word = Expect
Code Memory
Verified?
Data?
Does
Done
Start
VERIFY CODE
MEMORY FLOW
All
Yes
Yes
No
PIC18F2XJXX/4XJXX FAMILY
Failure,
Report
Error
4.3
The term “Blank Check” means to verify that the device
has no programmed memory cells. All memories must
be verified: code memory and Configuration bits. The
Device ID registers (3FFFFEh:3FFFFFh) should be
ignored.
A “blank” or “erased” memory cell will read as a ‘1’, so
Blank Checking a device merely means to verify that all
bytes read as FFh. The overall process flow is shown
in Figure 4-3.
Given that Blank Checking is merely code verification
with FFh expect data, refer to Section 4.2 “Verify Code
Memory and Configuration Word” for implementation
details.
FIGURE 4-3:
Blank Check Device
Blank Check
Device
Blank?
Abort
Start
Is
No
BLANK CHECK FLOW
Yes
Continue
DS39687E-page 17