PIC18LF4550T-I/PT Microchip Technology, PIC18LF4550T-I/PT Datasheet - Page 12

• Manufacturer Part Number: PIC18LF4550T-I/PT
• Description: IC PIC MCU FLASH 16KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4550T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, I2C, EAUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2455/2550/4455/4550
22. Module: EUSART
23. Module: Timer1/3
DS80478A-page 12
Note:
With the auto-wake-up option enabled by setting
the
(PIR1<5>) bit will become set on a high-to-low
transition on the RX pin. However, the WUE bit
may not clear within 1 T
transition on RX.
While the WUE bit is set, reading the Receive Buf-
fer (RCREG) will not clear the RCIF interrupt flag.
Therefore, the first opportunity to automatically
clear RCIF by reading RCREG may take longer
than expected.
Work around
Either of these work arounds can be used:
• Clear the WUE bit in software, after the wake-
• Poll the WUE bit and read RCREG, after the
Affected Silicon Revisions
In 16-Bit Asynchronous Counter mode (with or
without use of the Timer1 oscillator), the TMR1H
and TMR3H buffers do not update when TMRxL is
read.
This issue only affects reading the TMRxH
registers. The timers increment and set the
interrupt flags as expected. The timer registers can
also be written as expected.
Work around
1. Use 8-bit mode by clearing the RD16 bit
2. Use the internal clock synchronization option
Affected Silicon Revisions
up event has occurred and prior to reading the
receive buffer (RCREG)
WUE bit is automatically cleared
A3
A3
(T1CON<7>).
by clearing the T1SYNC bit (T1CON<2>).
X
X
WUE
RCIF can only be cleared by reading
RCREG.
B4
B4
bit
(BAUDCON<1>),
B5
B5
CY
of a low-to-high
B6
B6
the
B7
B7
RCIF
24. Module: Reset
25. Module: ECCP (PWM Mode)
The indicated version of silicon does not support
the
parameter D002 in Section 28.1 “DC Character-
istics: Supply Voltage” of the data sheet. The
RAM content may be altered during a Reset event
if the following conditions are met.
• Device is accessing RAM
• Asynchronous Reset (WDT, BOR or MCLR)
Work around
None.
Affected Silicon Revisions
When configured for half-bridge operation with
dead band (CCPxCON<7:6> = 10), the PWM
output may be corrupted for certain values of the
PWM duty cycle. This can occur when these
additional criteria are also met:
• A non-zero dead-band delay is specified
• The duty cycle has a value of 0 through 3, or
Work around
None.
Affected Silicon Revisions
occurs when a write operation is being
executed (start of a Q4 cycle) or if a RESET
instruction is executed and immediately
followed by a RETURN instruction
(PDC<6:0> > 0)
4n + 3 (n ≥ 1)
A3
A3
X
X
functionality
B4
B4
X
© 2009 Microchip Technology Inc.
described
B5
B5
X
in
B6
B6
X
Note
B7
B7
X
1
of