AT32UC3B164-AUT Atmel, AT32UC3B164-AUT Datasheet - Page 91

• Manufacturer Part Number: AT32UC3B164-AUT
• Description: IC MCU AVR32 64KB FLASH 48-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B164-AUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 28
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP, 48-VQFP
• Controller Family/series: AT32UC3B
• No. Of I/o's: 28
• Ram Memory Size: 16KB
• Cpu Speed: 60MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

32059K–03/2011
- OCD
- Processor and Architecture
- USART
1. The auxiliary trace does not work for CPU/HSB speed higher than 50MHz
1. LDM instruction with PC in the register list and without ++ increments Rp
2. RETE instruction does not clear SREG[L] from interrupts
3. Exceptions when system stack is protected by MPU
4. Privilege violation when using interrupts in application mode with protected system
1. ISO7816 info register US_NER cannot be read
SR.CPCS bit, reconfigure the RA and RC registers for the lower channel with the real
values.
The auxiliary trace does not work for CPU/HSB speed higher than 50MHz.
Fix/Workaround
Do not use the auxiliary trace for CPU/HSB speed higher than 50MHz.
For LDM with PC in the register list: the instruction behaves as if the ++ field is always set, ie
the pointer is always updated. This happens even if the ++ field is cleared. Specifically, the
increment of the pointer is done in parallel with the testing of R12.
Fix/Workaround
None.
The RETE instruction clears SREG[L] as expected from exceptions.
Fix/Workaround
When using the STCOND instruction, clear SREG[L] in the stacked value of SR before
returning from interrupts with RETE.
RETS behaves incorrectly when MPU is enabled and MPU is configured so thatsystem
stack is not readable in unprivileged mode.
Fix/Workaround
Workaround 1: Make system stack readable in unprivileged mode, or
Workaround 2: Return from supervisor mode using rete instead of rets. This requires:
1. Changing the mode bits from 001b to 110b before issuing the instruction. Updating the
mode bits to the desired value must be done using a single mtsr instruction so it is done
atomically. Even if this step is described in general as not safe in the UC technical reference
guide, it is safe in this very specific case.
2. Execute the RETE instruction.
stack
If the system stack is protected by the MPU and an interrupt occurs in application mode, an
MPU DTLB exception will occur.
Fix/Workaround
Make a DTLB Protection (Write) exception handler which permits the interrupt request to be
handled in privileged mode.
The NER register always returns zero.
Fix/Workaround
None.
AT32UC3B
91