DSPIC33FJ64GS610T-I/PF Microchip Technology, DSPIC33FJ64GS610T-I/PF Datasheet - Page 235

• Manufacturer Part Number: DSPIC33FJ64GS610T-I/PF
• Description: MCU/DSP 16BIT 64KB FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GS610T-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 100-TQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 9K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Numeric And Arithmetic Format: Fixed-Point or Floating-Point
• Instruction Set Architecture: Harvard
• Device Million Instructions Per Second: 40 MIPs
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 85
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 16-8:
REGISTER 16-9:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-10
bit 9-3
CHPCLKEN
Note:
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
R/W-0
R/W-0
R/W-0
R/W-0
The chop clock generator operates with the primary PWM clock prescaler (PCLKDIV<2:0>) in the PTCON2
register (Register 16-2).
SSEVTCMP<15:3>: Special Event Compare Count Value bits
Unimplemented: Read as ‘0’
CHPCLKEN: Enable Chop Clock Generator bit
1 = Chop clock generator is enabled
0 = Chop clock generator is disabled
Unimplemented: Read as ‘0’
CHOP<9:3>: Chop Clock Divider bits
Value in 8.32 ns increments. The frequency of the chop clock signal is given by the following
expression:
Chop Frequency = 1/(16.64 * (CHOP<7:3> + 1) * Primary Master PWM Input Clock Period)
R/W-0
R/W-0
R/W-0
U-0
—
SSEVTCMP: PWM SECONDARY SPECIAL EVENT COMPARE REGISTER
CHOP: PWM CHOP CLOCK GENERATOR REGISTER
SSEVTCMP<7:3>
CHOP<7:3>
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
U-0
—
R/W-0
R/W-0
R/W-0
SSEVTCMP<15:8>
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
U-0
—
R/W-0
U-0
U-0
U-0
—
—
—
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
U-0
U-0
—
—
CHOP<9:8>
DS70591C-page 235
R/W-0
R/W-0
U-0
U-0
—
—
bit 8
bit 0
bit 8
bit 0