DSPIC33FJ64GS610-E/PT Microchip Technology, DSPIC33FJ64GS610-E/PT Datasheet - Page 96

• Manufacturer Part Number: DSPIC33FJ64GS610-E/PT
• Description: MCU/DSP 16BIT 64KB FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GS610-E/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 100-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 9K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Numeric And Arithmetic Format: Fixed-Point or Floating-Point
• Instruction Set Architecture: Harvard
• Device Million Instructions Per Second: 40 MIPs
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 85
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-54:
TABLE 4-55:
TABLE 4-56:
TRISG
PORTG
LATG
ODCG
Legend:
TRISG
PORTG
LATG
ODCG
Legend:
SFR Name
RCON
OSCCON
CLKDIV
PLLFBD
OSCTUN
REFOCON
ACLKCON
Legend:
Note
Name
Name
SFR
SFR
1:
2:
Addr
Addr
02F0
02F2
02F4
02F6
02F0
02F2
02F4
02F6
SFR
SFR
Addr
074E
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
0740
0742
0744
0746
0748
0750
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
The RCON register reset values are dependent on type of reset.
The OSCCON register reset values are dependent on the FOSC configuration bits, and on type of reset.
SFR
Bit 15
Bit 15
PORTG REGISTER MAP FOR dsPIC33FJ32GS608 AND dsPIC33FJ64GS608 DEVICES
PORTG REGISTER MAP FOR dsPIC33FJ32GS406/606 AND dsPIC33FJ64GS406/606 DEVICES
SYSTEM CONTROL REGISTER MAP
ENAPLL
—
—
—
—
—
—
—
—
TRAPR
ROON
Bit 15
ROI
—
—
—
Bit 14
Bit 14
IOPUWR
—
—
—
—
—
—
—
—
APLLCK
Bit 14
—
—
—
Bit 13
Bit 13
COSC<2:0>
DOZE<2:0>
—
—
—
—
—
—
—
—
SELACLK
ROSSLP
Bit 13
—
—
—
Bit 12
Bit 12
—
—
—
—
—
—
—
—
ROSEL
Bit 12
—
—
—
—
Bit 11
Bit 11
DOZEN
—
—
—
—
—
—
—
—
Bit 11
—
—
—
—
—
Bit 10
Bit 10
Bit 10
RODIV<3:0>
—
—
—
—
—
—
—
—
—
—
—
APSTSCLR<2:0>
FRCDIV<2:0>
NOSC<2:0>
Bit 9
TRISG9
ODCG9
TRISG9
ODCG9
—
—
—
LATG9
LATG9
Bit 9
Bit 9
RG9
RG9
VREGS
Bit 8
—
TRISG8
TRISG8
ODCG8
ODCG8
LATG8
LATG8
Bit 8
RG8
Bit 8
RG8
CLKLOCK
ASRCSEL
EXTR
Bit 7
PLLPOST<1:0>
—
—
TRISG7
TRISG7
ODCG7
ODCG7
LATG7
LATG7
Bit 7
RG7
Bit 7
RG7
FRCSEL
SWR
Bit 6
TRISG6
TRISG6
ODCG6
ODCG6
LATG6
LATG6
—
—
—
Bit 6
RG6
Bit 6
RG6
SWDTEN
LOCK
Bit 5
—
—
—
Bit 5
Bit 5
—
—
—
—
—
—
—
—
PLLDIV<8:0>
WDTO
Bit 4
Bit 4
Bit 4
—
—
—
—
—
—
—
—
—
—
—
SLEEP
TRISG3
TRISG3
Bit 3
LATG3
LATG3
CF
Bit 3
RG3
Bit 3
RG3
—
—
—
—
TUN<5:0>
PLLPRE<4:0>
TRISG2
TRISG2
Bit 2
IDLE
LATG2
LATG2
Bit 2
Bit 2
—
—
—
RG2
RG2
—
—
TRISG1
ODCG1
LATG1
Bit 1
BOR
Bit 1
Bit 1
RG1
—
—
—
—
—
—
—
OSWEN 0300
TRISG0
ODCG0
LATG0
Bit 0
Bit 0
RG0
Bit 0
POR
—
—
—
—
—
—
Resets
Resets
Resets
xxxx
03CF
xxxx
0000
0000
03CC
xxxx
0000
0000
0040
0030
0000
0000
2300
All
All
All
(1)
(2)