DSPIC33FJ64GP310-E/PF Microchip Technology, DSPIC33FJ64GP310-E/PF Datasheet - Page 78

IC DSPIC MCU/DSP 64K 100TQFP

DSPIC33FJ64GP310-E/PF

Manufacturer Part Number
DSPIC33FJ64GP310-E/PF
Description
IC DSPIC MCU/DSP 64K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP310-E/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Table D-2
checksum when using CodeGuard™ Security with
Boot Segment Program Flash code protection with
Standard Security and small-sized boot Flash.
TABLE D-2:
DS70152H-page 78
dsPIC33FJ256GP506A
Note 1:
Device
provides an example of how to calculate the
CFGB1 = Byte sum of ((FBS & 0xCD) + (FSS & 0xCF) + (FGS & 0x07) + (FOSCSEL & 0xA7) +
(FOSC & 0xC7) + (FWDT & 0xFF) + (FPOR & 0xE7) + (FICD & 0xE3))
CHECKSUM COMPUTATION EXAMPLE WHEN USING CodeGuard™ SECURITY
Disabled
Read Code
Protection
CFGB1
(1)
+ SUM(0:2ABFF) – SUM(0200:07FE)
Checksum Computation
© 2010 Microchip Technology Inc.
Erased Value
0xFD01

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