AT32UC3A3128S-CTUT Atmel, AT32UC3A3128S-CTUT Datasheet - Page 30

• Manufacturer Part Number: AT32UC3A3128S-CTUT
• Description: IC MCU 128KB FLASH 144TBGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A3128S-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-TBGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 7-2.
7.4
32072C–AVR32–2010/03
CPU Local Bus Mapping
Peripheral Address Mapping
0xFFFF5000
0xFFFF5400
Some of the registers in the GPIO module are mapped onto the CPU local bus, in addition to
being mapped on the Peripheral Bus. These registers can therefore be reached both by
accesses on the Peripheral Bus, and by accesses on the local bus.
Mapping these registers on the local bus allows cycle-deterministic toggling of GPIO pins since
the CPU and GPIO are the only modules connected to this bus. Also, since the local bus runs at
CPU speed, one write or read operation can be performed per clock cycle to the local bus-
mapped GPIO registers.
The following GPIO registers are mapped on the local bus:
Table 7-3.
Port
0
1
Register
Output Driver Enable Register (ODER)
Output Value Register (OVR)
Pin Value Register (PVR)
Output Driver Enable Register (ODER)
Output Value Register (OVR)
Pin Value Register (PVR)
Local Bus Mapped GPIO Registers
TWIS0
TWIS1
Two-wire Slave Interface - TWIS0
Two-wire Slave Interface - TWIS1
Mode
WRITE
SET
CLEAR
TOGGLE
WRITE
SET
CLEAR
TOGGLE
-
WRITE
SET
CLEAR
TOGGLE
WRITE
SET
CLEAR
TOGGLE
-
Local Bus
Address
0x40000040
0x40000044
0x40000048
0x4000004C
0x40000050
0x40000054
0x40000058
0x4000005C
0x40000060
0x40000140
0x40000144
0x40000148
0x4000014C
0x40000150
0x40000154
0x40000158
0x4000015C
0x40000160
AT32UC3A3/A4
Access
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Read-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Read-only
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