ATMEGA645V-8MU Atmel, ATMEGA645V-8MU Datasheet - Page 265

• Manufacturer Part Number: ATMEGA645V-8MU
• Description: IC AVR MCU FLASH 64K 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA645V-8MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, UART, USI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26. Memory Programming
26.1
2570M–AVR–04/11
Program And Data Memory Lock Bits
The Atmel ATmega325/3250/645/6450 provides six Lock bits which can be left unprogrammed
(“1”) or can be programmed (“0”) to obtain the additional features listed in
bits can only be erased to “1” with the Chip Erase command.
Table 26-1.
Note:
Table 26-2.
BLB12
BLB11
BLB02
BLB01
LB2
LB1
BLB0 Mode
LB Mode
Lock Bit Byte
1
2
3
1
2
3
4
Memory Lock Bits
1. “1” means unprogrammed, “0” means programmed
Lock Bit Byte
Lock Bit Protection Modes
BLB02
LB2
1
1
0
1
1
0
0
BLB01
LB1
Bit No
1
0
0
1
0
0
1
(1)
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is
disabled in Parallel and Serial Programming mode. The
Fuse bits are locked in both Serial and Parallel
Programming mode.
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and Serial Programming
mode. The Boot Lock bits and Fuse bits are locked in both
Serial and Parallel Programming mode.
No restrictions for SPM or LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
Description
–
–
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
(1)(2)
ATmega325/3250/645/6450
(1)
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
(1)
Table
26-2. The Lock
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