PIC17C752T-16I/PT Microchip Technology, PIC17C752T-16I/PT Datasheet - Page 256

IC MCU OTP 8KX16 A/D PWM 64TQFP

PIC17C752T-16I/PT

Manufacturer Part Number
PIC17C752T-16I/PT
Description
IC MCU OTP 8KX16 A/D PWM 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C752T-16I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
16KB (8K x 16)
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
678 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000, DM173001
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C752T-16I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC17C7XX
FIGURE 20-15:
TABLE 20-10: SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
DS30289B-page 256
Param.
71A
72A
73A
No.
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
70
71
72
73
74
75
76
77
78
79
80
83
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
Note:
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TscH2ssH,
TscL2ssH
Data in "Typ" column is at 5V, 25°C unless otherwise stated.
B
Symbol
2
B
Refer to Figure 20-5 for load conditions.
SPI SLAVE MODE TIMING (CKE = 0)
SS to SCK or SCK input
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the 1st clock edge
of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS to SDO output hi-impedance
SCK output rise time (Master mode)
SCK output fall time (Master mode)
SDO data output valid after SCK edge
SS
70
after SCK edge
80
71
73
Characteristic
MSb IN
MSb
74
72
75, 76
Continuous
Single Byte
Continuous
Single Byte
BIT6 - - - - - -1
BIT6 - - - -1
1.25T
1.25T
1.5T
1.5T
78
79
Min
100
100
Tcy
CY
CY
40
40
10
CY
CY
+ 40
+ 40
+ 30
+ 30
LSb
79
78
LSb IN
Typ†
10
10
10
10
83
2000 Microchip Technology Inc.
Max
77
25
25
50
25
25
50
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 1)
Conditions

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