AT32UC3A0512-CTUT Atmel, AT32UC3A0512-CTUT Datasheet - Page 87

• Manufacturer Part Number: AT32UC3A0512-CTUT
• Description: IC MCU 512KB FLASH 144TFBGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0512-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-TFBGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 109
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105, ATAVRRZ600
• Minimum Operating Temperature: - 40 C
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

32058HS–AVR32–03/09
6. CPU Cycle Counter does not reset the COUNT system register on COMPARE match.
7. Memory Protection Unit (MPU) is non functional.
8. The following alternate GPIO function C are not available in revE
9.
Figure 15-1. Timer/Counter clock connections on RevE
10. Local Bus fast GPIO not available in RevE.
11. Spurious interrupt may corrupt core SR mode to exception
Source
Internal
External
The device revision E does not reset the COUNT system register on COMPARE match. In
this revision, the COUNT register is clocked by the CPU clock, so when the CPU clock
stops, so does incrementing of COUNT.
Fix/Workaround
None.
Fix/Workaround
Do not use the MPU.
MACB-WOL on GPIO9 (PA09), MACB-WOL on GPIO18 (PA18), USB-USB_ID on GPIO21
(PA21), USB-USB_VBOF on GPIO22 (PA22), and all function B and C on GPIO70 to
GPIO101 (PX00 to PX39).
Fix/Workaround
Do not use these alternate B and C functions on the listed GPIO pins.
Here is the table of Rev E
Fix/Workaround
Do not use on this silicon revision.
If the rules listed in the chapter `Masking interrupt requests in peripheral modules' of the
AVR32UC Technical Reference Manual are not followed, a spurious interrupt may occur. An
interrupt context will be pushed onto the stack while the core SR mode will indicate an
exception. A RETE instruction would then corrupt the stack..
Fix/Workaround
Follow the rules of the AVR32UC Technical Reference Manual. To increase software
robustness, if an exception mode is detected at the beginning of an interrupt handler,
change the stack interrupt context to an exception context and issue a RETE instruction.
Clock connection table on Rev E
Name
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
XC0
XC1
XC2
Connection
32 KHz Oscillator
PBA Clock / 4
PBA Clock / 8
PBA Clock / 16
PBA Clock / 32
AT32UC3A
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