ATSAM3U4EA-AU Atmel, ATSAM3U4EA-AU Datasheet - Page 24

IC MCU 32BIT 256KB FLASH 144LQFP

ATSAM3U4EA-AU

Manufacturer Part Number
ATSAM3U4EA-AU
Description
IC MCU 32BIT 256KB FLASH 144LQFP
Manufacturer
Atmel
Series
SAM3Ur
Datasheets

Specifications of ATSAM3U4EA-AU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, AT91SAM3U-EK, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Controller Family/series
SAM3U
No. Of I/o's
96
Ram Memory Size
52KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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6. Input/Output Lines
6.1
6.2
6.3
24
General Purpose I/O Lines (GPIO)
System I/O Lines
Serial Wire JTAG Debug Port (SWJ-DP)
SAM3U Series
The SAM3U has different kinds of input/output (I/O) lines, such as general purpose I/Os (GPIO)
and system I/Os. GPIOs can have alternate functions thanks to multiplexing capabilities of the
PIO controllers. The same GPIO line can be used whether it is in IO mode or used by the multi-
plexed peripheral. System I/Os are pins such as test pin, oscillators, erase pin, analog inputs or
debug pins.
With a few exceptions, the I/Os have input schmitt triggers. Refer to the footnotes associated
with
GPIO Lines are managed by PIO Controllers. All I/Os have several input or output modes such
as, pull-up, input schmitt triggers, multi-drive (open-drain), glitch filters, debouncing or input
change interrupt. Programming of these modes is performed independently for each I/O line
through the PIO controller user interface. For more details, refer to the “PIO Controller” section
of the product datasheet.
The input output buffers of the PIO lines are supplied through VDDIO power supply rail.
The SAM3U embeds high speed pads able to handle up to 65 MHz for HSMCI and SPI clock
lines and 35 MHz on other lines. See “AC Characteristics” of the product datasheet for more
details. Typical pull-up value is 100 kΩ for all I/Os.
Each I/O line also embeds an ODT (On-Die Termination), (see
of an internal series resistor termination scheme for impedance matching between the driver
output (SAM3) and the PCB track impedance preventing signal reflection. The series resistor
helps to reduce I/Os switching current (di/dt) thereby reducing in turn, EMI. It also decreases
overshoot and undershoot (ringing) due to inductance of interconnect between devices or
between boards. In conclusion, ODT helps reducing signal integrity issues.
Figure 6-1.
System I/O lines are pins used by oscillators, test mode, reset, flash erase and JTAG to name
but a few.
The SWJ-DP pins are TCK/SWCLK, TMS/SWDIO, TDO/SWO, TDI and commonly provided on
a standard 20-pin JTAG connector defined by ARM. For more details about voltage reference
and reset state, refer to
“PIO Controller - PIOA - PIOB - PIOC” on page 6
On-Die Termination schematic
Zout ~ 10 Ohms
SAM3 Driver with
Table 3-1, “Signal Description List”
36 Ohms Typ.
Rodt
ODT
Z0 ~ Zout + Rodt
Z0 ~ 50 Ohms
PCB Trace
within
Table 3-1, “Signal Description
Figure 6-1
Receiver
below). ODT consists
6430DS–ATARM–28-Mar-11
List”.

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