STM8S903F3P6 STMicroelectronics, STM8S903F3P6 Datasheet - Page 87

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STM8S903F3P6

Manufacturer Part Number
STM8S903F3P6
Description
MCU 8BIT 8KB FLASH 20TSSOP
Manufacturer
STMicroelectronics
Series
STM8Sr
Datasheet

Specifications of STM8S903F3P6

Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
STM8S90x
Core
STM8
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STICE-SYS001
Featured Product
STM32 Cortex-M3 Companion Products
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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0
STM8S903K3 STM8S903F3
10.3.11
10.3.11.1
10.3.11.2
EMC characteristics
Susceptibility tests are performed on a sample basis during product characterization.
Functional EMS (electromagnetic susceptibility)
While executing a simple application (toggling 2 LEDs through I/O ports), the product is
stressed by two electromagnetic events until a failure occurs (indicated by the LEDs).
A device reset allows normal operations to be resumed. The test results are given in the table
below based on the EMS levels and classes defined in application note AN1709 (EMC design
guide for STMicrocontrollers).
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
Prequalification trials
Most of the common failures (unexpected reset and program counter corruption) can be
recovered by applying a low state on the NRST pin or the oscillator pins for 1 second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behavior is detected, the software can be hardened
to prevent unrecoverable errors occurring. See application note AN1015 (Software techniques
for improving microcontroller EMC performance).
Symbol
V
V
FESD
EFTB
FESD: Functional electrostatic discharge (positive and negative) is applied on all pins of
the device until a functional disturbance occurs. This test conforms with the IEC 61000-4-2
standard.
FTB: A burst of fast transient voltage (positive and negative) is applied to V
through a 100 pF capacitor, until a functional disturbance occurs. This test conforms with
the IEC 61000-4-4 standard.
Parameter
Voltage limits to be
applied on any I/O pin to
induce a functional
disturbance
Fast transient voltage
burst limits to be applied
through 100 pF on V
and V
functional disturbance
SS
pins to induce a
DocID15590 Rev 5
DD
Table 49: EMS data
Conditions
V
(HSI clock), conforming to IEC 61000-4-2
V
(HSI clock),conforming to IEC 61000-4-4
DD
DD
= 3.3 V, T
= 3.3 V, T
A
A
= 25 °C ,f
= 25 °C, f
MASTER
MASTER
Electrical characteristics
= 16 MHz
= 16 MHz
DD
Level/
class
2/B
4/A
and V
(1)
(1)
87/113
SS

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