STM8L101F3P6 STMicroelectronics, STM8L101F3P6 Datasheet - Page 5

• Manufacturer Part Number: STM8L101F3P6
• Description: MCU 8BIT 8K FLASH 20TSSOP
• Manufacturer: STMicroelectronics
• Series: STM8L EnergyLiter

Specifications of STM8L101F3P6

• Core Processor: STM8
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Infrared, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: STM8L10x
• Core: STM8
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 3
• Operating Supply Voltage: 1.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWSTM8
• Minimum Operating Temperature: - 40 C
• Featured Product: STM32 Cortex-M3 Companion Products
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

STM8L101xx
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STM8L101xx device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Standard 20-pin UFQFPN package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
20-pin UFQFPN package pinout for STM8L101F1U6ATR,
STM8L101F2U6ATR and STM8L101F3U6ATR part numbers. . . . . . . . . . . . . . . . . . . . . . 15
20-pin TSSOP package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Standard 28-pin UFQFPN package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
28-pin UFQFPN package pinout for STM8L101G3U6ATR and
STM8L101G2U6ATR part numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
32-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
IDD(RUN) vs. VDD, fCPU = 2 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
IDD(RUN) vs. VDD, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
IDD(WAIT) vs. VDD, fCPU = 2 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
IDD(WAIT) vs. VDD, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Typ. IDD(Halt) vs. VDD, fCPU = 2 MHz and 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Typical HSI frequency vs. V
Typical HSI accuracy vs. temperature, V
Typical HSI accuracy vs. temperature, VDD = 1.65 V to 3.6 V. . . . . . . . . . . . . . . . . . . . . . 47
Typical LSI RC frequency vs. VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Typical VIL and VIH vs. VDD (standard I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Typical VIL and VIH vs. VDD (true open drain I/Os). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Typical pull-up resistance R
Typical pull-up current IPU vs. V
Typ. VOL at VDD = 3.0 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Typ. VOL at VDD = 1.8 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Typ. VOL at VDD = 3.0 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Typ. VOL at VDD = 1.8 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Typ. VDD - VOH at VDD = 3.0 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Typ. VDD - VOH at VDD = 1.8 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Typical NRST pull-up resistance R
Typical NRST pull-up current I
Recommended NRST pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
SPI timing diagram - slave mode and CPHA = 1
SPI timing diagram - master mode
Typical application with I2C bus and timing diagram 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
UFQFPN32 - 32-lead ultra thin fine pitch quad flat no-lead package outline (5 x 5). . . . . . 67
UFQFPN32 recommended footprint
LQFP32 - 32-pin low profile quad flat package outline (7 x 7) . . . . . . . . . . . . . . . . . . . . . . 69
LQFP32 recommended footprint
UFQFPN28 - 28-lead ultra thin fine pitch quad flat no-lead package outline (4 x 4)
UFQFPN28 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
UFQFPN20 3 x 3 mm 0.6 mm package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
UFQFPN20 recommended footprint
TSSOP20 - 20-lead thin shrink small package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
TSSOP20 recommended footprint
DD
PU
Doc ID 15275 Rev 11
pu
vs. V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
DD
(1)
vs. V
(1)
PU
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
with VIN=VSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
(1)
DD
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
vs. V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
with VIN=VSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
DD
= 3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
List of figures
(1)
. . . . 70
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