STR715FR0T1 STMicroelectronics, STR715FR0T1 Datasheet - Page 19
STR715FR0T1
Manufacturer Part Number
STR715FR0T1
Description
MCU 32BIT 64K FLASH 64-LQFP
Manufacturer
STMicroelectronics
Series
STR7r
Datasheet
1.RLINK-ST.pdf
(78 pages)
Specifications of STR715FR0T1
Core Processor
ARM7
Core Size
32-Bit
Speed
66MHz
Connectivity
I²C, HDLC, Smartcard, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8 + 16K)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x12b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
STR715x
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MCBSTR7, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
STR710-SK/HIT, STR711-SK/IAR, STR712-SK/IAR, STR71X-SK/RAIS, STX-PRO/RAIS, STX-RLINK, STR79-RVDK/CPP, STR79-RVDK, STR79-RVDK/UPG
Minimum Operating Temperature
0 C
On-chip Adc
12 bit, 4 Channel
For Use With
MCBSTR7UME - MCBSTR7 + ULINK-ME DEV KIT497-6412 - BOARD EVAL STPM01/STR715FR0MCBSTR7 - BOARD EVAL STM STR71X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
STR71xF
Table 4.
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
Pin n°
C7 P0.4/S1.MISO I/O pu C
D7 V
C6 A.16
D6 A.17
C5 WE.0
D5 P0.5/S1.MOSI I/O pu C
A7
A6
E7 V
F7
B6 A.15
E6 A.18
A5 A.19
B5 WE.1
A3 V
A2 V
A4 P0.6/S1.SCLK I/O pu C
B4 P0.7/S1.SS
P0.2/S0.SCLK
/I1.SCL
P0.3/S0.SS/
I1.SDA
A.14
SS18
18
33
SS
STR710 pin description
Pin name
I/O pu C
I/O pu C
I/O pu C
O
O
O
O
O
O
O
O
S
S
S
S
7)
7)
7)
7)
7)
7)
5)
5)
Input
T
T
T
T
T
T
X 4mA X
X 4mA X
4mA X
4mA X
8mA
8mA
8mA
8mA
8mA
8mA
8mA
8mA
4mA X
4mA X
Output
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Stabilization for main voltage regulator.
Stabilization for main voltage regulator. Requires
external capacitors of at least 10µF + 33nF
between V
External Memory Interface: address bus
External Memory Interface: active low MSB write
enable output
External Memory Interface: active low LSB write
enable output
Supply voltage for digital I/Os
Ground voltage for digital I/Os
function
Port 0.2
Port 0.3
Port 0.4
Port 0.5
Port 0.6
Port 0.7
reset)
(after
Main
18
BSPI0: Serial
Clock
Note: Programming AF function
selects I2C by default. BSPI must be
enabled by SPI_EN bit in the
BOOTCR register.
SPI0: Slave
Select input
active low.
Note: Programming AF function
selects I2C by default. BSPI must be
enabled by SPI_EN bit in the
BOOTCR register.
SPI1: Master in/Slave out data
SPI1: Master out/Slave In data
SPI1: Serial Clock
SPI1: Slave Select input active low
and V
SS18
Alternate function
. See
System architecture
I2C1: Serial clock
I2C1: Serial Data
4)
Figure
4)
5.
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