C8051F332-GMR Silicon Laboratories Inc, C8051F332-GMR Datasheet - Page 74

• Manufacturer Part Number: C8051F332-GMR
• Description: IC 8051 MCU 4K FLASH 20MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F332-GMR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• For Use With: 336-1451 - ADAPTER PROGRAM TOOLSTICK F330
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.2.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051F330/1 implements 8 kB of this program
memory space as in-system, re-programmable Flash memory, organized in a contiguous block from
addresses 0x0000 to 0x1DFF. Addresses above 0x1DFF are reserved on the 8 kB devices. The
C8051F332/3 and C8051F334/5 implement, in contiguous blocks, 2 and 4 kB, from addresses 0x0000 to
0x07FF or 0x0000 to 0x0FFF, respectively. Addresses above 0x0800 and 0x1000 are reserved on the 2
and 4 kB devices, respectively.
Program memory is normally assumed to be read-only. However, the CIP-51 can write to program memory
by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX write instruction. This fea-
ture provides a mechanism for the CIP-51 to update program code and use the program memory space for
non-volatile data storage. Refer to
0x1DFF
0x1E00
0x0FFF
0x0000
0x0000
0x0000
0x7FF
PROGRAM/DATA MEMORY
PROGRAM/DATA MEMORY
PROGRAM/DATA MEMORY
Programmable in 512
Programmable in 512
Programmable in 512
C8051F330/1
C8051F332/3
C8051F334/5
Byte Sectors)
Byte Sectors)
Byte Sectors)
RESERVED
8 K FLASH
(In-System
4 K FLASH
(In-System
2 K FLASH
(In-System
(FLASH)
(FLASH)
(FLASH)
Section “11. Flash Memory” on page 103
Figure 9.2. Memory Map
0xFFFF
0x01FF
0x0200
0x0000
Rev. 1.7
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
0x0000 to 0x01FF, wrapped
XRAM - 512 Bytes
(accessable using MOVX
(Indirect Addressing
Same 512 bytes as from
on 512-byte boundaries
(Direct and Indirect
EXTERNAL DATA ADDRESS SPACE
INTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
C8051F330/1/2/3/4/5
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
for further details.
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