C8051F012-GQ Silicon Laboratories Inc, C8051F012-GQ Datasheet - Page 119

IC 8051 MCU 32K FLASH 32LQFP

C8051F012-GQ

Manufacturer Part Number
C8051F012-GQ
Description
IC 8051 MCU 32K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F01xr
Datasheets

Specifications of C8051F012-GQ

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
8
Number Of Timers
4 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
On-chip Dac
12 bit, 2 Channel
Data Rom Size
32 KB
A/d Bit Size
10 bit
A/d Channels Available
4
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1193

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F012-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F012-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
16.6.2. Clock Rate Register
119
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Bits7-0: SMB0CR.[7:0]: SMBus Clock Rate Preset
R/W
Bit7
The SMB0CR Clock Rate register controls the frequency of the serial clock SCL in master
mode. The 8-bit word stored in the SMB0CR Register preloads a dedicated 8-bit timer.
The timer counts up, and when it rolls over to 0x00, the SCL logic state toggles.
The SMB0CR setting should be bounded by the following equation, where SMB0CR is the
unsigned 8-bit value in register SMB0CR, and SYSCLK is the system clock frequency in
Hz:
The resulting SCL signal high and low times are given by the following equations:
Using the same value of SMB0CR from above, the Bus Free Timeout period is given in the
following equation:
R/W
Bit6
Figure 16.5. SMB0CR: SMBus Clock Rate Register
SMB0CR < ((288 - 0.85 * SYSCLK) / 1.125
T
T
R/W
Bit5
HIGH
BFT
T
LOW
10 * [(256 – SMB0CR) + 1] / SYSCLK
(258 – SMB0CR) / SYSCLK + 625 ns
= (256 – SMB0CR) / SYSCLK
R/W
Bit4
Rev. 1.7
R/W
Bit3
R/W
Bit2
E
6)
R/W
Bit1
R/W
Bit0
SFR Address:
Reset Value
00000000
0xCF

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