C8051F120-GQR Silicon Laboratories Inc, C8051F120-GQR Datasheet

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C8051F120-GQR

Manufacturer Part Number
C8051F120-GQR
Description
IC 8051 MCU FLASH 128K 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Datasheets

Specifications of C8051F120-GQR

Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
336-1285 - KIT DEV EMBEDDED MODEM336-1284 - KIT DEV EMBEDDED ETHERNET336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
C8051F120-GQR
0
Analog Peripherals
12-Bit ADC
-
-
-
-
-
-
8-Bit ADC
-
-
-
-
Two 12-Bit DACs
-
Two Comparators
Internal Voltage Reference
V
On-Chip JTAG Debug & Boundary Scan
-
-
-
-
-
Precision Mixed Signal
DD
MONEN
±1 LSB INL; no missing codes
Programmable throughput up to 100 ksps
8 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
±1 LSB INL; no missing codes
Programmable throughput up to 500 ksps
8 external inputs
Programmable amplifier gain: 4, 2, 1, 0.5
Can synchronize outputs to timers for jitter-free waveform generation
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping, watchpoints, stack monitor
Inspect/modify memory and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
IEEE1149.1 compliant boundary scan
VREFD
XTAL1
XTAL2
VREF0
AIN0.0
AIN0.1
AIN0.2
AIN0.3
AIN0.4
AIN0.5
AIN0.6
AIN0.7
DGND
DGND
DGND
AGND
AGND
DAC1
DAC0
Monitor/Brown-out Detector
VREF
CP0+
CP1+
CP0-
CP1-
VDD
VDD
VDD
TCK
TMS
TDO
RST
AV+
AV+
TDI
Oscillator
Oscillator
External
Internal
Circuit
CP0
Analog Power
2%
Digital Power
A
M
U
X
Monitor
VDD
CP1
JTAG
Logic
(12-Bit)
(12-Bit)
VREF
DAC1
DAC0
SENSOR
TEMP
Prog
Gain
Boundary Scan
WDT
Debug HW
100 MIPS, 128 kB Flash, 12-Bit ADC, 100-Pin Mixed-Signal MCU
N/M
PLL
100 ksps
(12-Bit)
System
Clock
ADC
Reset
Copyright © 2004 by Silicon Laboratories
16 x 16 Mult/Acc
C
8
0
5
1
o
e
r
(2-cycle)
8
External Data Memory Bus
FLASH
SFR Bus
128 kB
XRAM
256 B
RAM
8 kB
Target Buffer
Prefetch
256 Byte
Branch
HW
32
High-Speed 8051 µC Core
-
-
-
Memory
-
-
-
Digital Peripherals
-
-
-
-
-
-
Clock Sources
-
-
-
Supply Voltage: 3.0 to 3.6 V
-
-
100-Pin TQFP
Temperature Range: –40 to +85 °C
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 100 MIPS throughput with 100 MHz system clock
16 x 16 multiply/accumulate engine (2-cycle)
8448 bytes data RAM
128 kB Flash; in-system programmable in 1024-byte sectors (1024 bytes
are reserved)
External parallel data memory interface
64 port I/O; all are 5 V tolerant
Hardware SMBus™ (I2C™ compatible), SPI™, and two UART serial
ports available concurrently
Programmable 16-bit counter/timer array with six capture/compare
modules
5 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Real-time clock mode using timer 3 or PCA
Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation
On-chip programmable PLL: up to 100 MHz
External oscillator: Crystal, RC, C, or Clock
Typical operating current: 50 mA at 100 MHz
Typical stop mode current: 0.4 uA
SPI Bus
0, 1, 2, 4
Latches
UART0
UART1
Timer 3
P0, P1,
SMBus
Timers
6 Chnl
P2, P3
PCA
Address Bus
Bus Control
Data Bus
ADC
500 ksps
(8-Bit)
C
T
L
A
d
d
D
a
a
r
t
O
C
R
S
S
B
A
R
P4 Latch
P5 Latch
P6 Latch
P7 Latch
C8051F120
Prog
Gain
P0
Drv
P1
Drv
P2
Drv
P3
Drv
A
M
U
X
8:1
DRV
DRV
DRV
DRV
P4
P5
P6
P7
P0.0
P0.7
P1.0/AIN1.0
P1.7/AIN1.7
P2.0
P2.7
P3.0
P3.7
VREF1
P4.0
P4.4
P4.5/ALE
P4.6/RD
P4.7/WR
P5.0/A8
P5.7/A15
P6.0/A0
P6.7/A7
P7.0/D0
P7.7/D7
10.6.2004

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C8051F120-GQR Summary of contents

Page 1

... Target Buffer 8 6 Chnl 1 PCA Prefetch HW Timers Timer 3 C 128 kB FLASH P0, P1, o P2, P3 256 B Latches r RAM XRAM External Data Memory Bus Mult/Acc (2-cycle) Copyright © 2004 by Silicon Laboratories C8051F120 P0.0 P0 Drv P0 P1.0/AIN1 Drv P1.7/AIN1 P2 Drv P2 P3.0 P3 Drv P3.7 VREF1 A ADC 8:1 ...

Page 2

... Precision Mixed Signal Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders CONDITIONS MIN 3.0 Monitor Enabled DD Monitor Disabled C8051F120DK Development Kit MIN NOM MAX (mm) (mm) (mm 1.20 A1 0.05 - ...

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