AT91R40807-33AI Atmel, AT91R40807-33AI Datasheet

IC ARM7 MCU 176 TQFP

AT91R40807-33AI

Manufacturer Part Number
AT91R40807-33AI
Description
IC ARM7 MCU 176 TQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91R40807-33AI

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Features
Description
The AT91R40807 microcontroller is a member of the Atmel AT91 16/32-bit microcon-
troller family, which is based on the ARM7TDMI processor core. This processor has a
high-performance 32-bit RISC architecture with a high-density 16-bit instruction set
and very low power consumption. In addition, a large number of internally banked reg-
isters result in very fast exception handling, making the device ideal for real-time
control applications.
The AT91R40807 microcontroller features a direct connection to off-chip memory,
including Flash, through the fully-programmable External Bus Interface (EBI). An
eight-level priority vectored interrupt controller, in conjunction with the Peripheral Data
Controller, significantly improves the real-time performance of the device.
The device is manufactured using Atmel’s high-density CMOS technology. By combin-
ing the ARM7TDMI processor core with a large on-chip high-speed SRAM and a wide
range of peripheral functions on a monolithic chip, the AT91R40807 is a powerful
microcontroller that offers a flexible and high-performance solution to many compute-
intensive embedded control applications.
Incorporates the ARM7TDMI
136K Bytes On-chip SRAM
Fully-programmable External Bus Interface (EBI)
8-level Priority, Individually Maskable, Vectored Interrupt Controller
32 Programmable I/O Lines
3-channel 16-bit Timer/Counter
2 USARTs
Programmable Watchdog Timer
Advanced Power-saving Features
Fully Static Operation:
1.8V to 3.6V Operating Range
-40°C to +85°C Temperature Range
Available in a 100-lead TQFP Package
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE (In-circuit Emulation)
– 32-bit Data Bus
– Single-clock Cycle Access
– Maximum External Address Space of 64M Bytes
– Up to 8 Chip Selects
– Software-programmable 8/16-bit External Databus
– 4 External Interrupts, Including a High-priority Low-latency Interrupt Request
– 3 External Clock Inputs
– 2 Multi-purpose I/O Pins per Channel
– 2 Dedicated Peripheral Data Controller (PDC) Channels per USART
– CPU and Peripheral Can Be Deactivated Individually
– 0 Hz to 33 MHz Internal Frequency Range at 3.0V, 85°C
ARM Thumb Processor Core
Note: This is a summary document. A complete document is
available on our web site at www.atmel.com.
AT91
ARM
Microcontrollers
AT91R40807
Summary
®
Rev. 1345DS–ATARM–02/02
Thumb
®
1

Related parts for AT91R40807-33AI

AT91R40807-33AI Summary of contents

Page 1

... The device is manufactured using Atmel’s high-density CMOS technology. By combin- ing the ARM7TDMI processor core with a large on-chip high-speed SRAM and a wide range of peripheral functions on a monolithic chip, the AT91R40807 is a powerful microcontroller that offers a flexible and high-performance solution to many compute- intensive embedded control applications ...

Page 2

... Pin Configuration Figure 1. AT91R40807 Pinout (Top View) P22/RXD1 76 NWR1/NUB 77 GND 78 NRST 79 NWDOVF 80 VDD 81 MCKI 82 P23 83 P24/BMS 84 P25/MCKO 85 GND 86 GND 87 TMS 88 TDI 89 TDO 90 TCK 91 NRD/NOE 92 NWR0/NWE 93 VDD 94 VDD 95 NWAIT 96 NCS0 97 NCS1 98 P26/NCS2 99 P27/NCS3 100 AT91R40807 2 100-lead TQFP 50 P1/TIOA0 49 P0/TCLK0 48 D15 47 D14 46 D13 ...

Page 3

... Pin Description Table 1. AT91R40807 Pin Description Module Name Function A0 - A23 Address Bus D0 - D15 Data Bus NCS0 - NCS3 Chip Select CS4 - CS7 Chip Select NWR0 Lower Byte 0 Write Signal NWR1 Upper Byte 1 Write Signal EBI NRD Read Signal NWE Write Enable NOE ...

Page 4

... Block Diagram Figure 2. AT91R40807 TMS TDO TDI TCK MCKI P25/MCKO P12/FIQ P9/IRQ0 P10/IRQ1 Interrupt Controller P11/IRQ2 P P13/SCK0 I P14/TXD0 O P15/RXD0 P20/SCK1 P21/TXD1/NTRI P22/RXD1 P16 P17 P18 P19 P23 P24/BMS AT91R40807 4 Embedded ICE ARM7TDMI Core ASB 128K-byte Extended SRAM Clock 8K-byte RAM ASB ...

Page 5

... Bridge. The AMBA Bridge drives the APB, which is designed for accesses to on-chip peripherals and optimized for low power consumption. The AT91R40807 microcontroller implements the ICE port of the ARM7TDMI processor on dedicated pins, offering a complete, low-cost and easy-to-use debug solution for tar- get debugging. ...

Page 6

... The 3-channel, 16-bit Timer Counter (TC) is highly-programmable and supports capture or waveform modes. Each TC channel can be programmed to measure or generate dif- ferent kinds of waves, and can detect and control two input/output signals. The TC has also three external clock signals. AT91R40807 6 1345DS–ATARM–02/02 ...

Page 7

... Associated Documentation The AT91R40807 is a part of the AT91X40 Series microcontrollers, a member of the Atmel AT91 16/32-bit microcontroller family which is based on the ARM7TDMI processor core. Table 2 contains details of associated documentation for further reference. Table 2. Associated Documentation Product Information Internal architecture of processor ARM/Thumb instruction sets ...

Page 8

... VDD pin supplies the I/O pads and the device core. The supported voltage range 1.8V to 3.6V. Input/Output The AT91R40807 accepts voltage levels up to the power supply limit on the pads. Considerations After the reset, the peripheral I/Os are initialized as inputs to provide the user with maxi- mum flexibility ...

Page 9

... ARM7TDMI advanced performance. Being able to dynamically update application software in the 128-Kbyte SRAM adds an extra dimension to the AT91R40807. This 128-Kbyte SRAM can also be used to vali- date the code to be stored in the on-chip ROM memory prior to mass production of the AT91M40807. At system boot, the code is downloaded from external nonvolatile mem- ory to this on-chip extended SRAM ...

Page 10

... The ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction, Interrupt, Fast Interrupt) are mapped from address 0x0 to address 0x20. In order to allow these vectors to be redefined dynamically by the software, the AT91R40807 Microcontrollers use a remap command that enables switching between the boot mem- ory and the internal primary SRAM bank addresses ...

Page 11

... This eliminates the need for interrupt masking at the AIC or core level in real-time and multi-tasking systems. The AT91R40807 microcontroller has a 4-channel PDC dedicated to the two on-chip USARTs. One PDC channel is dedicated to the receiver and one to the transmitter of each USART. ...

Page 12

... PIO: Parallel I/O Controller The AT91R40807 microcontroller has 32 programmable I/O lines. Six pins are dedi- cated as general-purpose I/O pins. Other I/O lines are multiplexed with an external signal of a peripheral to optimize the use of available package pins. The PIO controller enables generation of an interrupt on input change and insertion of a simple input glitch filter on any of the PIO pins ...

Page 13

... PDC, and a Time Guard register, used when interfac- ing with slow remote equipment. The AT91R40807 microcontroller features a Timer Counter block that includes three identical 16-bit timer counter channels. Each channel can be independently pro- grammed to perform a wide range of functions including frequency measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation ...

Page 14

... Ordering Information Table 4. Ordering Information Ordering Code AT91R40807-33AI AT91R40807 14 Package Operation Range TQFP 100 Industrial (-40°C to 85°C) 1345DS–ATARM–02/02 ...

Page 15

... Packaging Information Figure 3. 100-lead Thin Quad Flat Pack Package Drawing aaa PIN 1 θ2 θ3 ddd 1345DS–ATARM–02/02 ccc AT91R40807 bbb S R2 θ1 R1 0.25 θ ...

Page 16

... Table 6. Lead Count Dimensions (mm) Pin D/E D1/E1 Count BSC BSC Min 100 16.0 14.0 0.17 Table 7. Device and 100-lead TQFP Package Maximum Weight 739 AT91R40807 16 Min Nom 0.09 0.09 0.45 0.6 1.00 REF 0.08 0.08 0.2 0° 3.5° 0° ...

Page 17

... By default, the package level 1 is qualified at 220°C (unless 235°C is stipulated). 3. The body temperature is the most important parameter but other profile parameters such as total exposure time to hot temperature or heating rate may also influence component reliability. A maximum of three reflow passes is allowed per component. AT91R40807 Convection or IR/Convection VPR 3°C/sec. max. ...

Page 18

... Document Details Title AT91R40807 Summary Literature Number 1345S Revision History Version A Publication Date: Jan-00 Version B Publication Date: Mar-00 Version C Publication Date: May-00 Version D Publication Date: 21-Jan-02 Revisions Since Previous Version All pages. Reformatted. Page: 9 Added information to section Internal Memories Page: 14 Change in Table 4 ...

Page 19

... No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...

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