AT90S2313-4PI Atmel, AT90S2313-4PI Datasheet - Page 34

• Manufacturer Part Number: AT90S2313-4PI
• Description: IC MCU 2K 4MHZ UART LV IT 20DIP
• Manufacturer: Atmel
• Series: AVR® 90Sr

Specifications of AT90S2313-4PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Timer/Counter1 Output
Compare Register A –
OCR1AH and OCR1AL
Timer/Counter1 Input Capture
Register – ICR1H and ICR1L
34
AT90S2313
The Timer/Counter1 is realized as an up or up/down (in PWM mode) counter with read
and write access. If Timer/Counter1 is written to and a clock source is selected, the
Timer/Counter1 continues counting in the timer clock cycle after it is preset with the writ-
ten value.
The Output Compare Register is a 16-bit read/write register.
The Timer/Counter1 Output Compare Register contains the data to be continuously
compared with Timer/Counter1. Actions on compare matches are specified in the
Timer/Counter1 Control and Status Registers.
Since the Output Compare Register (OCR1A) is a 16-bit register, a temporary register
TEMP is used when OCR1A is written to ensure that both bytes are updated simulta-
neously. When the CPU writes the high byte, OCR1AH, the data is temporarily stored in
the TEMP Register. When the CPU writes the low byte, OCR1AL, the TEMP Register is
simultaneously written to OCR1AH. Consequently, the high byte OCR1AH must be writ-
ten first for a full 16-bit register write operation.
The TEMP Register is also used when accessing TCNT1, and ICR1. If the main pro-
gram and interrupt routines perform access to registers using TEMP, interrupts must be
disabled during access from the main program or interrupts if interrupts are re-enabled.
The Input Capture Register is a 16-bit read-only register.
When the rising or falling edge (according to the input capture edge setting [ICES1]) of
the signal at the input capture pin (ICP) is detected, the current value of the
Timer/Counter1 is transferred to the Input Capture Register (ICR1). At the same time,
the Input Capture Flag (ICF1) is set (one).
Since the Input Capture Register (ICR1) is a 16-bit register, a temporary register TEMP
is used when ICR1 is read to ensure that both bytes are read simultaneously. When the
CPU reads the low byte ICR1L, the data is sent to the CPU and the data of the high byte
ICR1H is placed in the TEMP Register. When the CPU reads the data in the high byte
ICR1H, the CPU receives the data in the TEMP Register. Consequently, the low byte
ICR1L must be accessed first for a full 16-bit register read operation.
Bit
$2B ($4B)
$2A ($4A)
Read/Write
Initial value
Bit
$25 ($45)
$24 ($44)
Read/Write
Initial value
MSB
MSB
R/W
R/W
15
15
R
R
7
0
0
7
0
0
R/W
R/W
14
14
R
R
6
0
0
6
0
0
R/W
R/W
13
13
R
R
5
0
0
5
0
0
R/W
R/W
12
12
R
R
4
0
0
4
0
0
R/W
R/W
11
11
R
R
3
0
0
3
0
0
R/W
R/W
10
10
2
0
0
2
R
R
0
0
R/W
R/W
R
R
9
1
0
0
9
1
0
0
LSB
R/W
R/W
LSB
R
R
8
0
0
0
8
0
0
0
0839I–AVR–06/02
OCR1AH
OCR1AL
ICR1H
ICR1L