ATMEGA162-16AC Atmel, ATMEGA162-16AC Datasheet - Page 138

• Manufacturer Part Number: ATMEGA162-16AC
• Description: IC MCU AVR 16K 5V 16MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162-16AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Counter Unit
Output Compare Unit
138
ATmega162(V/U/L)
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
Figure 60 shows a block diagram of the counter and its surrounding environment.
Figure 60. Counter Unit Block Diagram
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or dec-
remented at each timer clock (clk
clock source, selected by the Clock Select bits (CS22:0). When no clock source is
selected (CS22:0 = 0) the timer is stopped. However, the TCNT2 value can be accessed
by the CPU, regardless of whether clk
priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits
located in the Timer/Counter Control Register (TCCR2). There are close connections
between how the counter behaves (counts) and how waveforms are generated on the
Output Compare output OC2. For more details about advanced counting sequences
and waveform generation, see “Modes of Operation” on page 141.
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation
selected by the WGM21:0 bits.
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register
(OCR2). Whenever TCNT2 equals OCR2, the comparator signals a match. A match will
set the Output Compare Flag (OCF2) at the next timer clock cycle. If enabled (OCIE2 =
1), the Output Compare Flag generates an output compare interrupt. The OCF2 flag is
automatically cleared when the interrupt is executed. Alternatively, the OCF2 flag can
be cleared by software by writing a logical one to its I/O bit location. The waveform gen-
erator uses the match signal to generate an output according to operating mode set by
the WGM21:0 bits and Compare Output mode (COM21:0) bits. The max and bottom sig-
nals are used by the waveform generator for handling the special cases of the extreme
values in some modes of operation (“Modes of Operation” on page 141).
Figure 61 shows a block diagram of the output compare unit.
count
direction
clear
clk
top
bottom
T
DATA BUS
2
TCNTn
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
Timer/Counter clock.
Signalizes that TCNT2 has reached maximum value.
Signalizes that TCNT2 has reached minimum value (zero).
direction
count
clear
bottom
Control Logic
TOV2
T
2). clk
can be used for generating a CPU interrupt.
top
T
2 is present or not. A CPU write overrides (has
T
TOVn
(Int.Req.)
2 can be generated from an external or internal
clk
Tn
Prescaler
Oscillator
T/C
2513C–AVR–09/02
clk
I/O
TOSC2
TOSC1