ATMEGA162L-8MI Atmel, ATMEGA162L-8MI Datasheet - Page 223

IC MCU AVR 16K 3V 8MHZ 44-QFN

ATMEGA162L-8MI

Manufacturer Part Number
ATMEGA162L-8MI
Description
IC MCU AVR 16K 3V 8MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162L-8MI

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Preventing Flash Corruption
2513C–AVR–09/02
executed within four CPU cycles. When BLBSET and SPMEN are cleared, LPM will
work as described in the Instruction set Manual.
The algorithm for reading the Fuse Low byte is similar to the one described above for
reading the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and
set the BLBSET and SPMEN bits in SPMCR. When an LPM instruction is executed
within three cycles after the BLBSET and SPMEN bits are set in the SPMCR, the value
of the Fuse Low byte (FLB) will be loaded in the destination register as shown below.
Refer to Table 101 on page 230 for a detailed description and mapping of the Fuse Low
byte.
Similarly, when reading the Fuse High byte, load 0x0003 in the Z-pointer. When an LPM
instruction is executed within three cycles after the BLBSET and SPMEN bits are set in
the SPMCR, the value of the Fuse High byte (FHB) will be loaded in the destination reg-
ister as shown below. Refer to Table 99 on page 229 for detailed description and
mapping of the Fuse High byte.
When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an LPM
instruction is executed within three cycles after the BLBSET and SPMEN bits are set in
the SPMCR, the value of the Extended Fuse byte (EFB) will be loaded in the destination
register as shown below. Refer to Table 99 on page 229 for detailed description and
mapping of the Extended Fuse byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that
are unprogrammed, will be read as one.
During periods of low V
age is too low for the CPU and the Flash to operate properly. These issues are the same
as for board level systems using the Flash, and the same design solutions should be
applied.
A Flash program corruption can be caused by two situations when the voltage is too low.
First, a regular write sequence to the Flash requires a minimum voltage to operate cor-
rectly. Secondly, the CPU itself can execute instructions incorrectly, if the supply voltage
for executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one
is sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot
2. Keep the AVR RESET active (low) during periods of insufficient power supply
Bit
Rd
Bit
Rd
Bit
Rd
Bit
Rd
Loader Lock bits to prevent any Boot Loader software updates.
voltage. This can be done by enabling the internal Brown-out Detector (BOD) if
the operating voltage matches the detection level. If not, an external low V
Reset Protection circuit can be used. If a Reset occurs while a write operation is
in progress, the write operation will be completed provided that the power supply
voltage is sufficient.
FLB7
FHB7
7
7
7
7
FHB6
FLB6
CC
6
6
6
6
, the Flash program can be corrupted because the supply volt-
BLB12
FLB5
FHB5
5
5
5
5
BLB11
FHB4
EFB4
FLB4
4
4
4
4
BLB02
FHB3
FLB3
EFB3
3
3
3
3
ATmega162(V/U/L)
BLB01
FLB2
FHB2
EFB2
2
2
2
2
FHB1
FLB1
EFB1
LB2
1
1
1
1
FLB0
FHB0
LB1
0
0
0
0
CC
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