PIC18F2539-E/SO Microchip Technology, PIC18F2539-E/SO Datasheet - Page 2

IC PIC MCU FLASH 12KX16 28SOIC

PIC18F2539-E/SO

Manufacturer Part Number
PIC18F2539-E/SO
Description
IC PIC MCU FLASH 12KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2539-E/SO

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18FXX39
3. Module: Core (Program Memory Space)
4. Module: Data EEPROM
DS80148A-page 2
Performing Table Read operations above the user
Program
1FFFFFh) may yield erroneous results at the
extreme low end of the device’s rated temperature
range (-40°C).
This applies specifically to addresses above
1FFFFFh, including the User ID locations
(200000h - 200007h), the configuration bytes
(300000h - 30000Dh), and the Device ID locations
(3FFFFEh and 3FFFFFh). User program memory
is unaffected.
Work around
Three possible work arounds are presented. Other
solutions may exist.
1. Do not perform Table Read operations on areas
2. Insert NOP instructions (specifically, literal FFFFh)
Date Codes that pertain to this issue:
All engineering and production devices.
When reading the data EEPROM, the contents of
the EEDATA register may be corrupted if the RD
bit (EECON1<0>) is set immediately following a
write to the address byte (EEADR). The actual
contents of the data EEPROM remain unaffected.
Work around
Do not set EEADR immediately before the execu-
tion of a read. Write to EEADR at least one instruc-
tion cycle before setting the RD bit. The instruction
between the write to EEADR and the read can be
any valid instruction, including a NOP.
Date Codes that pertain to this issue:
All engineering and production devices.
above the User Memory Space at -40°C.
around any Table Read instructions. The sug-
gested optimal number is 4 instructions before
and 8 instructions after each Table Read. This
may vary, depending upon the particular
application, and should be optimized by the user.
Memory
space
(addresses
over
Clarifications/Corrections to the Data Sheet:
In the Device Data Sheet (DS30485A), the following
clarifications and corrections should be noted.
None.
 2002 Microchip Technology Inc.

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