AT89C51RB2-3CSIM Atmel, AT89C51RB2-3CSIM Datasheet - Page 25

IC 8051 MCU FLASH 16K 40DIP

AT89C51RB2-3CSIM

Manufacturer Part Number
AT89C51RB2-3CSIM
Description
IC 8051 MCU FLASH 16K 40DIP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RB2-3CSIM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51RB2-3CSIM
Manufacturer:
ATMEL
Quantity:
982
Registers
4180E–8051–10/06
Table 19. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XX0X 00’HSB. XRAM’0b (see Table 65)
Not bit addressable
Number
DPU
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
EXTRAM
XRS1
XRS0
DPU
Bit
M0
AO
6
-
-
-
Disable Weak Pull-up
Cleared to activate the permanent weak pull up when latch data is logical 1
Set to disactive the weak pull-up (reduce power consumption)
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Pulse Length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock
periods.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
XRAM Size
EXTRAM Bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
ALE Output Bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used). (default) Set, ALE is active only during a MOVX or MOVC
instruction is used.
XRS1 XRS0 XRAM size
0
0
1
1
M0
5
0
1
0
1
256 Bytes (default)
512 Bytes
768 Bytes
1024 Bytes
4
-
XRS1
3
AT89C51RB2/RC2
XRS0
2
EXTRAM
1
AO
0
25

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