AT91FR4042-CI SL383 Atmel, AT91FR4042-CI SL383 Datasheet
AT91FR4042-CI SL383
Specifications of AT91FR4042-CI SL383
Related parts for AT91FR4042-CI SL383
AT91FR4042-CI SL383 Summary of contents
Page 1
... RISC architecture with a high-density 16-bit instruction set and very low power consumption. The AT91FR4042 ARM microcontroller features 2 Mbits of on-chip SRAM and 4 Mbits of Flash memory in a single compact 121-ball BGA package. Its high level of integra- tion and very small footprint make the device ideal for space-constrained applications. ...
Page 2
... Pin Configuration Figure 1. AT91FR4042 Pinout for 121-ball BGA Package (Top View) A1 Corner 1 2 P21/TXD1 P19 NTRI P22 P20 RXD1 SCK1 VDDIO GND P23 MCKI P24 P25 BMS MCK0 GND TMS NWE TDO NWR0 P26 VDDCORE VDDIO NCS2 NWAIT GND NLB NCS1 ...
Page 3
... Pin Description Table 1. AT91FR4042 Pin Description Module Name Function A0 - A23 Address Bus D0 - D15 Data Bus NCS0 - NCS3 External Chip Select CS4 - CS7 External Chip Select NWR0 Lower Byte 0 Write Signal NWR1 Upper Byte 1 Write Signal NRD Read Signal EBI NWE Write Enable ...
Page 4
... Table 1. AT91FR4042 Pin Description (Continued) Module Name Function NCSF Flash Memory Select Flash NBUSY Flash Memory Busy Output Memory NRSTF Flash Memory Reset Input VDDIO Power VDDCORE Power GND Ground Power VPP Power AT91FR4042 4 Active Type Level Comments Input Low Enables Flash Memory when pulled low ...
Page 5
... Block Diagram Figure 2. AT91FR4042 2648D–ATARM–03/04 Interface Bus External EBI: AT91FR4042 5 ...
Page 6
... Flash. The AT91 Flash Uploader software is able to upload program application software into its Flash memory. The AT91FR4042 integrates several peripherals, which are classified as system or user peripherals. All on-chip peripherals are 32-bit accessible by the AMBA Bridge, and can be pro- grammed with a minimum number of instructions ...
Page 7
... Peripheral Data Controller (PDC) channels. The 3-channel, 16-bit Timer Counter (TC) is highly programmable and supports capture or waveform modes. Each TC channel can be programmed to measure or generate dif- ferent kinds of waves, and can detect and control two input/output signals. The TC has also 3 external clock signals. AT91FR4042 7 ...
Page 8
... ARM7TDMI (Thumb) Datasheet AT91x40 Series Datasheet MCU AT91R40008 Electrical Characteristics Datasheet Flash AT49BV/LV4096A 4 megabit (256 K x 16/512 Memory Single 2.7 Volt Flash Memory Datasheet AT91FR4042 Datasheet (this document) AT49BV/LV4096A 4 megabit (256 K x 16/512 Single 2.7 Volt Flash Memory Datasheet 2648D–ATARM–03/04 ...
Page 9
... The AT91FR4042 has a fully static design and works on the Master Clock (MCK), pro- vided on the MCKI pin from an external source. The Master Clock is also provided as an output of the device on the MCKO pin, which is multiplexed with a general purpose I/O line ...
Page 10
... Being able to dynamically update application software in the 256-Kbyte SRAM adds an extra dimension to the AT91FR4042. The AT91FR4042 also integrates a 4-Mbit Flash memory that is accessed via the Exter- nal Bus Interface. All data, address and control lines, except for the Chip Select signal, are connected within the device ...
Page 11
... The ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction, Interrupt, Fast Interrupt) are mapped from address 0x0 to address 0x20. In order to allow these vectors to be redefined dynamically by the software, the AT91FR4042 uses a remap command that enables switching between the boot memory and the internal primary SRAM bank addresses ...
Page 12
... AT91FR4042 12 During boot, the EBI must be configured with correct number of standard wait states example, five standard wait states are required when the microcontroller is running at 66 MHz. The user must ensure that all VDDIO, VDDCORE and all GND pins are connected to their respective supplies by the shortest route. The Flash memory powers-on in read mode ...
Page 13
... Note that in the event that the Flash Uploader is erased from the first sector while the new final application is not yet programmed, and while the target system power supply is switched off, it leads to a non-recoverable error and the AT91FR4042 cannot be re- programmed by using the Flash Uploader. ...
Page 14
... Flash, for example, about 40 seconds per Mbyte when the word programming becomes the bottleneck. The AT91FR4042 peripherals are connected to the 32-bit wide Advanced Peripheral Bus. Peripheral registers are only word accessible. Byte and half-word accesses are not sup- ported ...
Page 15
... Peripheral Data Controller 2648D–ATARM–03/04 The AT91FR4042 has a 4-channel PDC dedicated to the two on-chip USARTs. One PDC channel is dedicated to the receiver and one to the transmitter of each USART. The user interface of a PDC channel is integrated in the memory space of each USART. It contains a 32-bit Address Pointer Register (RPR or TPR) and a 16-bit Transfer Counter Register (RCR or TCR) ...
Page 16
... The AIC also features a spurious vector detection feature, which reduces spurious inter- rupt handling to a minimum, and a protect mode that facilitates the debug capabilities. The AT91FR4042 has 32 programmable I/O lines. Six pins are dedicated as general- purpose I/O pins. Other I/O lines are multiplexed with an external signal of a peripheral to optimize the use of available package pins ...
Page 17
... PDC, and a Time-guard register, used when interfac- ing with slow remote equipment. The AT91FR4042 features a Timer Counter block that includes three identical 16-bit timer counter channels. Each channel can be independently programmed to perform a wide range of functions including frequency measurement, event counting, interval mea- surement, pulse generation, delay timing and pulse width modulation ...
Page 18
... Ordering Information Table 4. Ordering Information Ordering Code AT91FR4042-CI AT91FR4042 18 Package BGA 121 Temperature Operating Range Industrial (- 2648D–ATARM–03/04 ...
Page 19
... Packaging Information Figure 4. AT91FR4042 Package Table 5. Thermal Resistance Data Symbol Parameter Junction-to- ambient thermal JA resistance Junction-to-case JC thermal resistance Table 6. Device and 121-ball BGA Package Maximum Weight 194 2648D–ATARM–03/04 Condition Package 121-BGA Still Air 121-BGA mg AT91FR4042 Typ Units 33.9 C/W 7 ...
Page 20
... Table 7. 121-ball BGA Package Characterisicst Ball diameter Ball land Solder mask opening Plating material Solder ball material Moisture Sensitivity Level AT91FR4042 20 0.35 mm 0.4 ±0.05 mm 0.3 ± 0.05 mm Copper Sn/Pb 3 2648D–ATARM–03/04 ...
Page 21
... By default, the package level 1 is qualified at 220 C (unless 235 C is stipulated). 3. The body temperature is the most important parameter but other profile parameters such as total exposure time to hot temperature or heating rate may also influence component reliability. A maximum of three reflow passes is allowed per component. AT91FR4042 Convection or IR/Convection VPR 3 C/sec. max. ...
Page 22
... No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...