ATTINY44V-10SSU Atmel, ATTINY44V-10SSU Datasheet - Page 154

IC MCU AVR 4K FLASH 10MHZ 14SOIC

ATTINY44V-10SSU

Manufacturer Part Number
ATTINY44V-10SSU
Description
IC MCU AVR 4K FLASH 10MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY44V-10SSU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Package
14SOIC
Device Core
AVR
Family Name
ATtiny
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
12
Interface Type
SPI/USI
On-chip Adc
8-chx10-bit
Number Of Timers
2
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY44V-10SSU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
18.3
18.4
154
Performing a Page Write
Addressing the Flash During Self-Programming
ATtiny24/44/84
If the EEPROM is written in the middle of an SPM Page Load operation, all data loaded will be
lost.
To execute Page Write, set up the address in the Z-pointer, write “00000101” to SPMCSR and
execute SPM within four clock cycles after writing SPMCSR. The data in R1 and R0 is ignored.
The page address must be written to PCPAGE. Other bits in the Z-pointer must be written to
zero during this operation.
Note:
The Z-pointer is used to address the SPM commands.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
are addressed independently. Therefore it is of major importance that the software addresses
the same page in both the Page Erase and Page Write operation.
The LPM instruction uses the Z-pointer to store the address. Since this instruction addresses the
Flash byte-by-byte, also the LSB (bit Z0) of the Z-pointer is used.
Figure 18-1. Addressing the Flash During SPM
Note:
Bit
ZH (R31)
ZL (R30)
Z - REGISTER
The CPU is halted during the Page Write operation.
The variables used in
PROGRAM MEMORY
BIT
PAGE
PROGRAM
COUNTER
15
Figure 19-1 on page
Z15
15
Z7
7
PAGE ADDRESS
WITHIN THE FLASH
ZPCMSB
PCMSB
Z14
Z6
14
6
Figure 18-1
PCPAGE
Z13
13
Z5
5
163. Note that the Page Erase and Page Write operations
are listed in
ZPAGEMSB
PAGEMSB
Table 19-8 on page
PCWORD
Z12
12
Z4
4
WORD ADDRESS
WITHIN A PAGE
Table 19-8 on page
1
Z11
0
0
11
Z3
3
INSTRUCTION WORD
PAGE
Z10
10
Z2
2
162), the Program Counter can
162.
Z9
Z1
9
1
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
Z8
Z0
8
0
8006K–AVR–10/10

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