CY8C26643-24PI Cypress Semiconductor Corp, CY8C26643-24PI Datasheet - Page 33

• Manufacturer Part Number: CY8C26643-24PI
• Description: IC MCU 16K FLASH 256B 48-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ CY8C26xxxr

Specifications of CY8C26643-24PI

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.25 V
• Data Converters: A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-DIP (0.600", 15.24mm)
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Applications: CapSense
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.25V
• Package Type: PDIP
• Screening Level: Industrial
• Pin Count: 48
• Mounting: Through Hole
• Rad Hardened: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 428-1432; 428-1432-5; 428-1432

6.3.2
Table 32:
Port 0 Drive Mode 1 Register (PRT0DM1, Address = Bank 1, 01h)
Port 1 Drive Mode 1 Register (PRT1DM1, Address = Bank 1, 05h)
Port 2 Drive Mode 1 Register (PRT2DM1, Address = Bank 1, 09h)
Port 3 Drive Mode 1 Register (PRT3DM1, Address = Bank 1, 0Dh)
Port 4 Drive Mode 1 Register (PRT4DM1, Address = Bank 1, 11h)
Port 5 Drive Mode 1 Register (PRT5DM1, Address = Bank 1, 15h) Note : Port 5 is 4-bits wide
6.3.3
Table 33:
Port 0 Interrupt Control 0 Register (PRT0IC0, Address = Bank 1, 02h)
Port 1 Interrupt Control 0 Register (PRT1IC0, Address = Bank 1, 06h)
Port 2 Interrupt Control 0 Register (PRT2IC0, Address = Bank 1, 0Ah)
Port 3 Interrupt Control 0 Register (PRT3IC0, Address = Bank 1, 0Eh)
Port 4 Interrupt Control 0 Register (PRT4IC0, Address = Bank 1, 12h)
Port 5 Interrupt Control 0 Register (PRT5IC0, Address = Bank 1, 16h) Note : Port 5 is 4-bits wide
September 5, 2002
Bit [7:0] : DM1 [7:0] See truth table for Port Drive Mode 0 Registers, above
Bit [7:0] : IC0 [7:0] The two Interrupt Control bits that control a particular port pin are treated as a pair and are
decoded as follows:
IC1 [x], IC0 [x] = 0 0 = Disabled (Default)
IC1 [x], IC0 [x] = 0 1 = Falling Edge (-)
IC1 [x], IC0 [x] = 1 0 = Rising Edge (+)
IC1 [x], IC0 [x] = 1 1 = Change from Last Direct Read
Read/Write
Read/Write
Bit Name
Bit Name
Bit #
POR
Bit #
POR
Port Drive Mode 1 Registers
Port Interrupt Control 0 Registers
Port Drive Mode 1 Registers
Port Interrupt Control 0 Registers
IC0 [7]
DM1 [7]
W
7
0
W
7
0
IC0 [6]
DM1 [6]
W
6
0
W
6
0
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
IC0 [5]
DM1 [5]
W
5
0
W
5
0
IC0 [4]
DM1 [4]
W
4
0
W
4
0
DM1 [3]
IC0 [3]
W
3
0
W
3
0
DM1 [2]
IC0 [2]
W
W
2
0
2
0
DM1 [1]
IC0 [1]
W
W
1
0
1
0
I/O Registers
DM1 [0]
IC0 [0]
W
W
0
0
0
0
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