CY8C25122-24PXI Cypress Semiconductor Corp, CY8C25122-24PXI Datasheet - Page 119

• Manufacturer Part Number: CY8C25122-24PXI
• Description: IC MCU 4K FLASH 256B 8-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ CY8C25xxxr

Specifications of CY8C25122-24PXI

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.25 V
• Data Converters: A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 97:
1.
2.
3.
4.
5.
Notes :
NA: Not applicable
*: Indeterminate
Blk ID: Number of 64-byte block within FLASH memory space
Clock: CPU system clocking signal value
Pointer: Address of first byte of 64-byte block within SRAM memory space
TV: Table value
September 5, 2002
Reset
Read Block
Write Block
Erase Block
Protect Block
Erase All
Table Read
Checksum
Calibrate
Operation
This is a software-only reset.
This operation should only be invoked by calling a function in the FlashBlock library. Device specifications are no
longer guaranteed if this function is directly called by the user’s code .
This function can only be invoked by the device programmer, not by user’s code.
The address is hard coded by algorithm.
User-writeable registers include Main Oscillator Trim (IMO_TR), Internal Low Speed Oscillator Trim (ILO_TR), and
Bandgap Trim (BDG_TR).
1
3
5
2
3
CY8C25122, CY8C26233, CY8C26443, CY8C26643 (256 Bytes of SRAM)
Calibrates
then sets
PC and SP
values to 0
Move block
of 64 bytes
of FLASH
data into
SRAM
Program
block of
FLASH with
data from
SRAM
Erase block
of FLASH
Set memory
protection
bits
Erase all
FLASH data
Read device
type code
Calculate
FLASH
checksum
for data
range speci-
fied
Sets user-
writable reg-
isters to
default
Function
4
00
01
02
03
04
05
06
07
08
NA
3Ah
3Ah
3Ah
3Ah
3Ah
3Ah
3Ah
3Ah
F8h
NA
SP
+3
SP
+3
SP
+3
SP
+3
SP
+3
SP
+3
SP
+3
SP
+3
F9h
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
NA
Blk
ID
Blk
ID
Blk
ID
NA
NA
Tbl
ID
Blk
Cou
nter
NA
FAh
Input SRAM Data
Pointer
Pointer
FBh
NA
NA
NA
NA
NA
NA
NA
Clock
Clock
Clock
Clock
FCh
NA
NA
NA
NA
NA
FDh
NA
0
0
0
0
0
NA
0
NA
0
0
0
0
0
NA
0
FEh
NA
0
0
0
0
0
NA
0
FFh
*
0
0
0
0
0
TV
(0)
CS
H
0
F8h
*
0
0
0
0
0
TV
(1)
CSL
0
F9h
Output SRAM Data
*
*
*
*
*
*
TV
(2)
*
*
FAh
Special Features of the CPU
*
*
*
*
*
*
TV
(3)
*
*
FBh
FCh
*
*
*
*
*
*
TV
(4)
*
*
*
*
*
*
*
*
TV
(5)
*
*
FDh
FEh
*
*
*
*
*
*
TV
(6)
*
*
119
*
*
*
*
*
*
TV
(7)
*
*
FFh