MCP6S21-I/P Microchip Technology, MCP6S21-I/P Datasheet - Page 7

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MCP6S21-I/P

Manufacturer Part Number
MCP6S21-I/P
Description
IC PGA 1CH R-R I/O 8DIP
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP6S21-I/P

Package / Case
8-DIP (0.300", 7.62mm)
Amplifier Type
Programmable Gain
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
22 V/µs
-3db Bandwidth
12MHz
Current - Input Bias
1pA
Voltage - Input Offset
275µV
Current - Supply
1mA
Current - Output / Channel
30mA
Voltage - Supply, Single/dual (±)
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Number Of Channels
1
Available Set Gain
30.1 dB (Typ)
Input Offset Voltage
0.275 mV @ 5.5 V
Input Bias Current (max)
0.000001 uA (Typ) @ 5.5 V
Operating Supply Voltage
3 V or 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gain Bandwidth Product
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
1.1
1.1.1
The ideal PGA output voltage (V
EQUATION
(see Figure 1-7). This equation holds when there are
no gain or offset errors and when the V
a low impedance source (<< 0.1 ) at ground potential
(V
1.1.2
The PGA’s linear region of operation, including offset
and gain errors, is modeled by the line V
in Figure 1-7.
EQUATION
The endpoints of this line are at V
V
in the electrical specifications are related to Figure 1-7,
as follows:
EQUATION
DD
2003 Microchip Technology Inc.
SS
-0.3V. The gain and offset specifications referred to
V
V
= 0V).
where: G is the nominal gain
O_linear
O_ideal
V
REF
DC Output Voltage Specs / Model
G
IDEAL MODEL
LINEAR MODEL
V
=
=
=
g
OS
T
V
E
G 1
GV
A
SS
=
=
=
IN
+
=
100%
------------------------ -
G 1
--------- -
g
g
T
0V
E
E
A
V
+
1
------------------------------------- -
G V
V
g
IN
E
V
DD
2
0.3V
V
OUT
REF
V
0.6V
1
O_ideal
) is:
+
G
=
REF
V
O_linear
OS
=
V
SS
pin is tied to
+1
= 0.3V and
+
=
0.3V
, shown
0V
FIGURE 1-7:
the standard condition V
1.1.3
Figure 1-8 shows the Integral Non-Linearity (INL) of the
output voltage.
EQUATION
The output non-linearity specification in the electrical
specifications is related to Figure 1-8 by:
EQUATION
FIGURE 1-8:
standard condition V
V
DD
INL (V)
0
V
-0.3
0.3
0
DD
0
V
OUT
0.3
OUTPUT NON-LINEARITY
G
0
(V)
MCP6S21/2/6/8
INL
V
0.3
ONL
G
=
Output Voltage Model with
=
Output Voltage INL with the
REF
V
OUT
max V
-------------------------------- -
V
V
REF
V
DD
= V
DD
4
V
G
V
DD
- 0.3 V
SS
= V
O_linear
4
0.6V
G
- 0.3 V
V
= 0V.
SS
3
DS21117A-page 7
V
G
DD
= 0V.
3
G
DD
V
V
V
IN
V
2
1
(V)
IN
(V)

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