AD8021AR Analog Devices Inc, AD8021AR Datasheet - Page 19

• Manufacturer Part Number: AD8021AR
• Description: IC OPAMP VF LN LP LDIST 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD8021AR

• Slew Rate: 460 V/µs
• Rohs Status: RoHS non-compliant
• Design Resources: Driving the AD7366/7 Bipolar SAR ADC in Low-Distortion DC-Coupled Appls (CN0042)
• Amplifier Type: Voltage Feedback
• Number Of Circuits: 1
• -3db Bandwidth: 560MHz
• Current - Input Bias: 7.5µA
• Voltage - Input Offset: 400µV
• Current - Supply: 7.8mA
• Current - Output / Channel: 70mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 24 V, ±2.25 V ~ 12 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• No. Of Amplifiers: 1
• Bandwidth: 560MHz
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Peak Reflow Compatible (260 C): No
• Input Bias Current: 7500nA
• Output Type: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIONS
The typical voltage feedback op amp is frequency stabilized
with a fixed internal capacitor, C
compensation. To a first-order approximation, voltage feedback
op amps have a fixed gain bandwidth product. For example, if
its −3 dB bandwidth is 200 MHz for a gain of G = +1; at a gain
of G = +10, its bandwidth is only about 20 MHz. The AD8021 is
a voltage feedback op amp with a minimal C
1.5 pF. By adding an external compensation capacitor, C
user can circumvent the fixed gain bandwidth limitation of
other voltage feedback op amps.
Unlike the typical op amp with fixed compensation, the
AD8021 allows the user to:
•
•
•
Figure 58 is the AD8021 gain and phase plot that has been
simplified for instructional purposes. Arrow A in Figure 58
shows a bandwidth of about 200 MHz and a phase margin at
about 60° when the desired closed-loop gain is G = +1 and
the value chosen for the external compensation capacitor is
C
10 pF, then (as expected for a typical op amp) the bandwidth is
C
Figure 58. Simplified Diagram of Open-Loop Gain and Phase Response
= 10 pF. If the gain is changed to G = +10 and C
Maximize the amplifier bandwidth for closed-loop gains
between 1 and 10, avoiding the usual loss of bandwidth
and slew rate.
Optimize the trade-off between bandwidth and phase
margin for a particular application.
Match bandwidth in gain blocks with different noise gains,
such as when designing differential amplifiers (as shown in
Figure 65).
110
100
–10
90
86
80
70
60
50
40
30
20
10
0
1k
C
C
= 10pF
10k
100k
FREQUENCY (Hz)
C
1M
C
= 0pF
INTERNAL
10M
(B)
(B)
(A)
, using dominant pole
100M
(A)
(C)
INTERNAL
(C)
1G
C
of about
is fixed at
10G
C
180
135
90
45
0
, the
Rev. F | Page 19 of 28
degraded to about 20 MHz and the phase margin increases to
90° (Arrow B). However, by reducing C
and phase margin return to about 200 MHz and 60° (Arrow C),
respectively. In addition, the slew rate is dramatically increased,
as it roughly varies with the inverse of C
Table 6 and Figure 59 provide recommended values of com-
pensation capacitance at various gains and the corresponding
slew rate, bandwidth, and noise. Note that the value of the
compensation capacitor depends on the circuit noise gain, not
the voltage gain. As shown in Figure 60, the noise gain, G
an op amp gain block is equal to its noninverting voltage gain,
regardless of whether it is actually used for inverting or nonin-
verting gain. Thus,
1
Noninverting G
Inverting G
10
Figure 59. Suggested Compensation Capacitance vs. Gain for
6
9
8
7
5
4
3
2
1
0
R
S
1
3
2
NONINVERTING
2
+
–
AD8021
–V
G = G
N
S
Figure 60. The Noise Gain of Both is 5
C
= R
COMP
3
N
N
= +5
Maintaining 1 dB Peaking
F
5
= R
/R
4
G
F
6
+ 1
/R
NOISE GAIN (V/V)
5
G
+ 1
R
1kΩ
R
249Ω
F
G
6
249Ω
R
G
7
C
2
3
C
to 0 pF, the bandwidth
.
8
–
+
AD8021
–V
INVERTING
S
C
COMP
1kΩ
9
R
F
5
10
G
AD8021
G = –4
N
6
= +5
11
N
, of