AD8066ARM Analog Devices Inc, AD8066ARM Datasheet - Page 21

IC OPAMP VF R-R DUAL LN LP 8MSOP

AD8066ARM

Manufacturer Part Number
AD8066ARM
Description
IC OPAMP VF R-R DUAL LN LP 8MSOP
Manufacturer
Analog Devices Inc
Series
FastFET™r
Datasheet

Specifications of AD8066ARM

Slew Rate
180 V/µs
Mounting Type
Surface Mount
Rohs Status
RoHS non-compliant
Design Resources
Precision, Bipolar Configuration for the AD5426/32/43 8-Bit to12-Bit DACs (CN0036) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053)
Amplifier Type
Voltage Feedback
Number Of Circuits
2
Output Type
Rail-to-Rail
-3db Bandwidth
145MHz
Current - Input Bias
3pA
Voltage - Input Offset
400µV
Current - Supply
6.6mA
Current - Output / Channel
30mA
Voltage - Supply, Single/dual (±)
5 V ~ 24 V, ±2.5 V ~ 12 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
No. Of Amplifiers
2
Bandwidth
115MHz
No. Of Pins
8
Peak Reflow Compatible (260 C)
No
Input Bias Current
0.003nA
Input Offset Voltage Max
0.4mV
Common Mode Ratio
91
Rohs Compliant
No
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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The closed-loop bandwidth is inversely proportional to the noise
gain of the op amp circuit, (R
accurate for noise gains above 2. The actual bandwidth of circuits
with noise gains at or below 2 is higher than those predicted
with this model due to the influence of other poles in the
frequency response of the real op amp.
Figure 54 shows a voltage feedback amplifier’s dc errors. For
both inverting and noninverting configurations
The voltage error due to I
(though with the AD8065 input currents at typically less than
20 pA over temperature, this is likely not a concern). To include
common-mode and power supply rejection effects, total V
modeled
ΔV
PSR is the power supply rejection, ΔV
mode voltage from nominal conditions, and CMR is the common-
mode rejection.
WIDEBAND OPERATION
Figure 42 through Figure 44 show the circuits used for wideband
characterization for gains of +1, +2, and −1. Source impedance at
the summing junction (R
response with the amplifier’s input capacitance of 6.6 pF. This
can cause peaking and ringing if the time constant formed is too
low. Feedback resistances of 300 Ω to 1 kΩ are recommended,
because they do not unduly load down the amplifier, and the
time constant formed will not be too low. Peaking in the
frequency response can be compensated for with a small
capacitor (C
illustrated in Figure 12. This shows the effect of different
feedback capacitances on the peaking and bandwidth for a
noninverting G = +2 amplifier.
For the best settling times and the best distortion, the impedances
at the AD8065/AD8066 input terminals should be matched. This
minimizes nonlinear common-mode capacitive effects that can
degrade ac performance.
V
OS
S
nom
is the change in power supply from nominal conditions,
V
V
O
OS
is the offset voltage specified at nominal conditions,
(
error
=
V
V
R
I
Figure 54. Voltage Feedback Amplifier DC Errors
F
G
OS
) in parallel with the feedback resistor, as
)
nom
=
R
I
b
+
S
+
Δ
PSR
×
+V
V
R
OS
S
S
F
+
|| R
b+
R
Δ
CMR
and I
G
G
V
F
R
) forms a pole in the amplifier’s loop
+
CM
+ R
G
R
b–
F
G
is minimized if R
)/R
CM
I
I
b
b
+
I
R
G
is the change in common-
b
F
. This simple model is
×
A
R
F
+
V
OS
S
= R
R
V
G
O
OS
R
+
F
G
can be
|| R
R
F
Rev. J | Page 21 of 28
G
Actual distortion performance depends on a number of
variables:
Also see Figure 16 to Figure 20. The lowest distortion is obtained
with the AD8065 used in low gain inverting applications,
because this eliminates common-mode effects. Higher closed-
loop gains result in worse distortion performance.
INPUT PROTECTION
The inputs of the AD8065/AD8066 are protected with back-to-
back diodes between the input terminals as well as ESD diodes
to either power supply. This results in an input stage with picoamps
of input current that can withstand up to 1500 V ESD events
(human body model) with no degradation.
Excessive power dissipation through the protection devices
destroys or degrades the performance of the amplifier. Differ-
ential voltages greater than 0.7 V result in an input current of
approximately (|V
series with the inputs.
For input voltages beyond the positive supply, the input current
is approximately (V
the input current is about (V
amplifier are to be subjected to sustained differential voltages
greater than 0.7 V, or to input voltages beyond the amplifier
power supply, input current should be limited to 30 mA by an
appropriately sized input resistor (R
FOR LARGE | V
R
The closed-loop gain of the application
Whether it is inverting or noninverting
Amplifier loading
Signal frequency and amplitude
Board layout
I
>
(| V + – V
V
I
30mA
| – 0.7V)
+
– V
R
Figure 55. Current-Limiting Resistor
+
I
I
− V
− V
|
CC
| 0.7 V)/R
AD8065
− 0.7)/R
I
− V
I
EE
. Beyond the negative supply,
I
, where R
+ 0.7)/R
I
), as shown in Figure 55.
AD8065/AD8066
R
R
I
I
>
>
V
O
(V
I
(V
I
FOR V
SUPPLY VOLTAGES
. If the inputs of the
is the resistance in
I
I
– V
– V
30mA
30mA
EE
EE
I
BEYOND
+ 0.7V)
– 0.7V)

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