AD627ARZ Analog Devices Inc, AD627ARZ Datasheet - Page 8

IC AMP INST R-R 25MA 8SOIC

AD627ARZ

Manufacturer Part Number
AD627ARZ
Description
IC AMP INST R-R 25MA 8SOIC
Manufacturer
Analog Devices Inc
Type
Rail-to-Railr
Datasheets

Specifications of AD627ARZ

Slew Rate
0.06 V/µs
Amplifier Type
Instrumentation
Number Of Circuits
1
Output Type
Rail-to-Rail
-3db Bandwidth
80kHz
Current - Input Bias
2nA
Voltage - Input Offset
25µV
Current - Supply
60µA
Current - Output / Channel
25mA
Voltage - Supply, Single/dual (±)
2.2 V ~ 36 V, ±1.1 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
1
Input Offset Voltage
200µV
Gain Db Min
5dB
Gain Db Max
1000dB
Bandwidth
40MHz
Amplifier Output
Rail To Rail
Cmrr
77dB
Supply Voltage Range
± 1.1V To ±
Common Mode Rejection Ratio
90
Current, Input Bias
3 nA (Single), 2 nA (Dual)
Current, Input Offset
0.3 nA
Current, Supply
60 μA
Impedance, Thermal
155 °C/W
Package Type
SOIC-8
Power Dissipation
0.8 W
Resistance, Input
20 Gigaohms (Differential), 20 Gigaohms (Common-Mode)
Temperature, Operating, Range
-40 to +85 °C
Voltage, Gain
1000 V/V
Voltage, Input
-35.9 to +35 V (Single), -17.9 to +17 V (Dual)
Voltage, Input Offset
50 μV (Single), 25 μV (Dual)
Voltage, Noise
38 nV/sqrt Hz
Voltage, Supply
2.2 to ±18 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gain Bandwidth Product
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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AD627
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
R
−IN
+IN
−V
REF
OUTPUT
+V
R
G
G
Figure 3. 8-Lead PDIP Pin Configuration
S
S
–V
–IN
+IN
R
G
S
1
2
3
4
(Not to Scale)
TOP VIEW
AD627
Description
External Gain Setting Resistor. Place gain setting resistor across R
Negative Input.
Positive Input.
Negative Voltage Supply Pin.
Reference Pin. Drive with low impedance voltage source to level shift the output voltage.
Output Voltage.
Positive Supply Voltage.
External Gain Setting Resistor. Place gain setting resistor across R
8
7
6
5
R
+V
OUTPUT
REF
G
S
Rev. D | Page 8 of 24
Figure 4. 8-Lead SOIC_N Pin Configuration
–V
+IN
–IN
R
G
G
G
S
pins to set the gain.
pins to set the gain.
1
2
3
4
(Not to Scale)
TOP VIEW
AD627
8
7
6
5
R
+V
OUTPUT
REF
G
S

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