SI8540-B-FWR Silicon Laboratories Inc, SI8540-B-FWR Datasheet
SI8540-B-FWR
Specifications of SI8540-B-FWR
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SI8540-B-FWR Summary of contents
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... PCB trace) from kHz and can achieve measurement accuracies of 0.2% (typical) at full load. The device output is a current signal proportional to measured current and is easily converted to a scaled voltage using a single external resistor. The Si8540 is available in compact SOT-23 or SOIC-8 packages. Functional Block Diagram ...
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... Si8540 2 Rev. 1.1 ...
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... Typical Performance Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1. Device Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7. Package Outline: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 8. Land Pattern: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9. Package Outline: SOT- 10. Land Pattern: SOT- Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Rev. 1.1 Si8540 Page 3 ...
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... Si8540 1. Electrical Specifications Table 1. Absolute Maximum Ratings Parameter Voltage at RG1, RG2, SHDN to GND Differential Input Voltage, RG1 to RG2 Voltage at OUT Current into SHDN, GND, OUT, RG1, RG2 Continuous Power Dissipation (T = +70 °C) A 8-pin SOIC derate 5.88 mW/°C above +70 °C* 5-pin SOT23 derate 7.1 mW/°C above +70 °C* ...
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... OUT (Note 150 mV, SENSE k, OUT (Note 2) OUT For I > 1.5 mA the internal OUT OUT current limitation starts to limit the output current Rev. 1.1 Si8540 = –40 to +85 °C) A Min Typ Max Unit 5 — — kHz — µA — ...
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... Si8540 2. Typical Application Schematic Controller System Bus Controller Control Bus Figure 1. Connecting the Si8540 in a Power Control Application 6 Micro R G1 Current Sense OUT Bias R LOAD Bias Filter R ( OUT OUT LOAD SENSE Rev. 1.1 V SUPPLY R SENSE I LOAD ) ...
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... Functional Description The Si8540 is designed to operate over an input common-mode range Figure 2 shows an example Si8540 application with external sense resistor, R output scaling resistor The supply current flowing into the Si8540 inverting and non-inverting inputs (R OUT negligible compared LOAD internal current sense amplifier measures the differential input voltage, V proportional to I ...
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... SENSE measured (low inductance metal film resistors are recommended). Also, note that the Si8540 requires at least 3 voltage headroom between the voltage at pin RG1 and pin OUT. This voltage headroom decreases as R increases ...
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... OUT OUT = 200 ) G2 SHDN 1.0 V/ div OUT 0.5 V/ div 0.5 % 0.4 % +85 °C 0.3 % +25 °C 0.2 % -40 °C 0.1 % 0.0 % -50 -40 - Figure 8. Output Error vs. Temperature Rev. 1.1 Si8540 = 10 k pF OUT G1 G2 µ 10 s/div = 200 pF 100 mV SENSE 1 µs/div Figure 7. Startup Delay ...
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... Si8540 0. °C 0.4% 0.3% 0.2% +25 ° °C 0.1% 0. (V) SUPPLY Figure 9. Output Error vs. Supply Voltage 10 1.0% 0.8% 0.6% 0.4% 0.2% 0. Figure 10. Output Error vs. Sense Voltage Rev. 1 120 160 V (mV) SENSE ...
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... RG2 7 — OUT 8 OUT RG1 7 NC GND 6 RG2 5 NC SHDN SOIC Figure 11. Pin Configuration Description Do not connect this pin. Power-side input. Ground. Do not connect this pin. Load-side input. Do not connect this pin. Current output. Rev. 1.1 Si8540 1 5 RG2 OUT SOT-23 11 ...
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... Ordering Guide 1 Ordering Part # Si8540-B-FW Si8540-B-FS Notes: 1. Tape and reel options are specified by adding an “R” suffix to the ordering part number. Example: “Si8450-B-FWR” indicates the SOT-23 package option in a tape and reel carrier. 2. Moisture sensitivity level (MSL) is (MSL2A) for SOT-23 package with peak reflow temperature of (260 °C) according to JEDEC industry-standard classifications. 3. Moisture sensitivity level (MSL) is (MSL2A) for SOIC-8 package with peak reflow temperature of (260 ° ...
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... Figure 13. SOT-23 Package Top Mark Table 6. SOT-23 Package Top Mark Table Line 1 Marking: Manufacturing trace code Figure 12. SOIC Package Top Mark Si8540 Manufacturing trace code. Corresponds to the year and work week of the mold date. Device revision (B) TTT = Assembly trace code Rev. 1.1 Si8540 13 ...
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... Si8540 7. Package Outline: 8-Pin Narrow Body SOIC Figure 14 illustrates the package details for the Si8540. Table 7 lists the values for the dimensions shown in the illustration. Table 7. SOIC Package Diagram Dimensions Symbol Notes: 1. All dimensions shown are in millimeters (mm). 2. Dimensioning and Tolerancing per ANSI Y14.5M-1982. ...
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... Land Pattern: 8-Pin Narrow Body SOIC Figure 15 illustrates the recommended land pattern details for the Si8540 in an 8-pin narrow-body SOIC. Table 8 lists the values for the dimensions shown in the illustration. Figure 15. PCB Land Pattern: 8-Pin Narrow Body SOIC Table 8. PCM Land Pattern Dimensions (8-Pin Narrow Body SOIC) ...
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... Si8540 9. Package Outline: SOT-23 Figure 16 illustrates the package details for the SOT-23. Table 9 lists the values for the dimensions shown in the illustration. Table 9. SOT-23 Package Diagram Dimensions Dimension Min A — A1 0.00 A2 0.90 b 0.30 c 0.08 D 2.90 BSC E 2.80 BSC E1 1.60 BSC e 0 ...
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... All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm. Card Assembly 5. A No-Clean, Type-3 solder paste is recommended. 6. The recommended card reflow profile is per the JEDEC/IPC J-STD-020D specification for Small Body Components. Figure 17. SOT-23 Land Pattern Rev. 1.1 Si8540 (mm) 2.70 0.95 1.05 0.60 17 ...
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... Added recommended PCB Land Pattern sections. Reformatted document from “IA2410 Rev 2.5” (Integration Associates) and renamed and re- released as “Si8540 Rev 1.0” (which obsoletes the previous preliminary internal revision 2.6). Revision 1.0 to Revision 1.1 MSL for the SOT-23 package improved to MSL2A (see " ...
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... N : OTES Rev. 1.1 Si8540 19 ...
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... Si8540 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...