MAX809JTRG ON Semiconductor, MAX809JTRG Datasheet - Page 9

• Manufacturer Part Number: MAX809JTRG
• Description: IC MPU SUPERVISORY 4.0V SOT23
• Manufacturer: ON Semiconductor
• Type: Simple Reset/Power-On Resetr

Specifications of MAX809JTRG

• Number Of Voltages Monitored: 1
• Output: Push-Pull, Totem Pole
• Reset: Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 4V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Monitored Voltage: 1.2 V to 4.9 V
• Undervoltage Threshold: 3.94 V
• Overvoltage Threshold: 4.06 V
• Manual Reset: No
• Watchdog: No
• Battery Backup Switching: No
• Power-up Reset Delay (typ): 460 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.2 V
• Supply Current (typ): 0.8 uA (Typ)
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 105 C
• Chip Enable Signals: No
• Minimum Operating Temperature: - 40 C
• Output Type: Active Low or Push-Pull
• Power Fail Detection: No
• Current, Output: 20 mA
• Current, Supply: 2.5 μA
• Package Type: SOT-23
• Temperature, Operating, Range: -40 to +105 °C
• Voltage, Output, High: 4.4 V
• Voltage, Output, Low: 0.3 V
• Voltage, Supply: 1.2 to 5.5 V
• Number Of Elements: 1
• Monitored Voltage 1 (typ): 1.2 to 4.9V
• Threshold Voltage 1 (max): 4.06V
• Watchdog Timer: No
• Reset Active Time: 460ms
• Operating Supply Voltage (min): 1.2V
• Operating Supply Voltage (max): 5.5V
• Reset Threshold Voltage (max): 4.06V
• Reset Threshold Voltage (min): 3.94V
• Family Name: MAX809
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 3
• Supply Current: 0.0025mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MAX809JTRGOSTR

V
reset timing during power−up, power−down, and
brownout/sag conditions, and rejects negative−going
transients (glitches) on the power supply line. Figure 16
shows the maximum transient duration vs. maximum
negative excursion (overdrive) for glitch rejection. Any
combination of duration and overdrive which lies under the
curve will not generate a reset signal. Combinations above
the curve are detected as a brownout or power−down.
Typically, transient that goes 100 mV below the reset
threshold and lasts 5.0 ms or less will not cause a reset pulse.
Transient immunity can be improved by adding a capacitor
in close proximity to the V
RESET Signal Integrity During Power−Down
Below this voltage the output becomes an “open circuit” and
does not sink current. This means CMOS logic inputs to the
Microprocessor will be floating at an undetermined voltage.
Most digital systems are completely shutdown well above
this voltage. However, in situations where RESET must be
CC
The MAX809 provides accurate V
The MAX809 RESET output is valid to V
300
250
200
150
100
50
Transient Rejection
0
10
Figure 16. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 25°C
RESET COMPARATOR OVERDRIVE (mV)
60
V
V
CC
TH
= 4.9 V
110
V
TH
160
Duration
= 2.93 V
CC
pin of the MAX809.
210
V
Overdrive
TH
260
V
= 1.2 V
TH
CC
monitoring and
310
APPLICATIONS INFORMATION
CC
360
= 1.0 V.
http://onsemi.com
410
9
maintained valid to V
connected from RESET to ground to discharge stray
capacitances and hold the output low (Figure 17). This
resistor value, though not critical, should be chosen such that
it does not appreciably load RESET under normal operation
(100 kW will be suitable for most applications).
Processors With Bidirectional I/O Pins
Depending on the current drive capability of the processor
pin, an indeterminate logic level may result if there is a logic
conflict. This can be avoided by adding a 4.7 kW resistor in
series with the output of the MAX809 (Figure 18). If there
are other components in the system which require a reset
signal, they should be buffered so as not to load the reset line.
If the other components are required to follow the reset I/O
of the Microprocessor, the buffer should be connected as
shown with the solid line.
Some Microprocessor’s have bidirectional reset pins.
V
MAX809/810
Figure 18. Interfacing to Bidirectional Reset I/O
Figure 17. Ensuring RESET Valid to V
CC
GND
V
RESET
RESET
CC
MAX809/810
4.7 k
V
GND
CC
V
CC
CC
RESET
RESET
= 0 V, a pull−down resistor must be
Microprocessor
RESET
BUFFER
GND
V
CC
BUFFERED RESET
TO OTHER SYSTEM
COMPONENTS
R1
100 k
CC
= 0 V