S-80945CNMC-G9FT2G Seiko Instruments, S-80945CNMC-G9FT2G Datasheet - Page 16

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S-80945CNMC-G9FT2G

Manufacturer Part Number
S-80945CNMC-G9FT2G
Description
IC VOLT DETECTOR 4.5V SOT23-5
Manufacturer
Seiko Instruments
Type
Simple Reset/Power-On Resetr
Datasheet

Specifications of S-80945CNMC-G9FT2G

Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
20 ms Minimum
Voltage - Threshold
4.5V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Output Type
Open Collector / Drain
Undervoltage Threshold
4.5 V
Power-up Reset Delay (typ)
Adj
Supply Voltage (min)
0.7 V
Supply Voltage (max)
10 V
Supply Current (typ)
1.3 uA
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Description/function
Open-drain and CMOS output,
Detection Range
4.5 V +/- 2 %
Internal Hysteresis
Yes
Manual Reset
No
Operating Supply Voltage
0.7 V to 10 V
Watchdog
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16
ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-809xxC Series
(−V
(−V
2. Hysteresis Width (V
3. Delay Time (t
4. Through-type Current
DET
DET
Figure 19 Detection Voltage (CMOS output products)
Remark Although the detection voltage and release voltage overlap in the range of 2.725 V to 2.754 V,
Hysteresis width is the voltage difference between the detection voltage and the release voltage (The
voltage at point B−The voltage at point A=V
malfunction caused by noise on input signal.
Delay time is a time internally measured from the instant at which input voltage to the VDD pin exceeds
the release voltage (+V
changes according to the external capacitor (C
The through-type current refers to the current that flows instantaneously at the time of detection and
release of a voltage detector. The through-type current is large in CMOS output products, and small in Nch
open-drain output products.
) Max.
) Min.
V
DD
+V
DET
OUT
D
)
is always larger than −V
HYS
DET
)
+V
) to the point at which the output of the OUT pin inverts. The delay time
DET
V
Detection voltage
Detection voltage
range
Seiko Instruments Inc.
DET
.
HYS
D
in Figure 15). The existence of the hysteresis width avoids
).
Figure 21
(+V
(+V
Figure 20 Release Voltage (CMOS output products)
Release voltage
t
DET
V
DET
D
DD
) Max.
) Min.
OUT
V
DD
OUT
Delay time
Release
voltage range
Rev.4.0
_00

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