DS1232LP Maxim Integrated Products, DS1232LP Datasheet - Page 2

IC MICRO MONITOR LOW POWER 8-DIP

DS1232LP

Manufacturer Part Number
DS1232LP
Description
IC MICRO MONITOR LOW POWER 8-DIP
Manufacturer
Maxim Integrated Products
Series
MicroMonitor™r
Type
Simple Reset/Power-On Resetr
Datasheet

Specifications of DS1232LP

Number Of Voltages Monitored
1
Output
Open Drain, Push-Pull
Reset
Active High/Active Low
Reset Timeout
Adjustable/Selectable
Voltage - Threshold
4.37V, 4.62V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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The second function the DS1232LP/LPS performs is pushbutton reset control. The DS1232LP/LPS
debounces the pushbutton input and guarantees an active reset pulse width of 250 ms minimum. The third
function is a watchdog timer. The DS1232LP/LPS has an internal timer that forces the reset signals to the
active state if the strobe input is not driven low prior to timeout. The watchdog timer function can be set
to operate on timeout settings of approximately 150 ms, 600 ms, and 1.2 seconds.
OPERATION - POWER MONITOR
The DS1232LP/LPS detects out-of-tolerance power supply conditions and warns a processor-based
system of impending power failure. When V
comparator outputs the signals RST and
signals become active as V
signals become active as V
microprocessor, as processing is stopped at the last possible moments of valid V
and
OPERATION - PUSHBUTTON RESET
The DS1232LP/LPS provides an input pin for direct connection to a pushbutton (Figure 1). The
pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such
that RST and
pushbutton reset input is released from low level.
OPERATION - WATCHDOG TIMER
The watchdog timer function forces RST and
stimulated for a predetermined time period. The time period is set by the TD input to be typically 150 ms
with TD connected to ground, 600 ms with TD left unconnected, and 1.2 seconds with TD connected to
V
If a high-to-low transition occurs on the
begins to timeout again. If the watchdog timer is allowed to timeout, then the RST and
driven to the active state for 250 ms minimum. The
signals, data signals, and/or control signals. When the microprocessor is functioning normally, these
signals would, as a matter of routine, cause the watchdog to be reset prior to timeout. To guarantee that
the watchdog timer does not timeout, a high-to-low transition must occur at or less than the minimum
shown in Table 1. A typical circuit example is shown in Figure 2.
CC
. The watchdog timer starts timing out from the set time period as soon as RST and
RST
are kept active for a minimum of 250 ms to allow the power supply and processor to stabilize.
RST
signals of at least 250 ms minimum are generated. The 250 ms delay starts as the
CC
CC
falls below 4.75 volts. When TOL is connected to V
falls below 4.5 volts. The RST and
ST
RST
input pin prior to timeout, the watchdog timer is reset and
CC
. When TOL is connected to ground, the RST and
RST
falls below a preset level as defined by TOL, the V
2 of 7
ST
signals to the active state when the
input can be derived from microprocessor address
RST
are excellent control signals for a
CC
CC
. On power-up, RST
, the RST and
RST
RST
ST
DS1232LP/LPS
are inactive.
input is not
signals are
RST
RST
CC

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