MAX16040PLA31+T Maxim Integrated Products, MAX16040PLA31+T Datasheet - Page 7

IC BATTERY BACKUP 3.08V 8-UDFN

MAX16040PLA31+T

Manufacturer Part Number
MAX16040PLA31+T
Description
IC BATTERY BACKUP 3.08V 8-UDFN
Manufacturer
Maxim Integrated Products
Type
Battery Backup Circuitr
Datasheet

Specifications of MAX16040PLA31+T

Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
3.08V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-µDFN
Undervoltage Threshold
3 V
Overvoltage Threshold
3.15 V
Manual Reset
Not Resettable
Watchdog
No Watchdog
Supply Voltage (max)
5.5 V
Supply Voltage (min)
0 V
Supply Current (typ)
22 uA
Maximum Power Dissipation
380.6 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(10-pin µDFN)
MAX16033–
MAX16036
10
1
2
3
4
5
6
7
8
9
PIN
(8-pin µDFN)
MAX16037–
MAX16040
_______________________________________________________________________________________
1
2
3
4
5
6
7
8
RESETIN
BATTON
CEOUT
NAME
RESET
BATT
CEIN
GND
OUT
WDI
PFO
V
PFI
MR
CC
Circuits in Small µDFN Packages
Active-Low Reset Output. RESET remains low when V
threshold (V
pulses when the internal watchdog times out. RESET remains low for the reset
timeout period (t
input goes from low to high, after RESETIN goes high, or after the watchdog triggers
a reset event. The MAX160_ _L is an active-low push-pull output, while the
MAX160_ _P is an active-low open-drain output.
Chip-Enable Input. The input to the chip-enable gating circuit. Connect to GND or
OUT if not used.
Power-Fail Input. PFO goes low when V
Ground
Manual-Reset Input (MAX16033/MAX16037). Driving MR low asserts RESET. RESET
remains asserted as long as MR is low and for the reset timeout period (t
MR transitions from low to high. Leave unconnected, or connect to V
MR has an internal 20kΩ pullup to V
Watchdog Input (MAX16034/MAX16038). If WDI remains high or low for longer than
the watchdog timeout period (t
pulse is triggered for the reset timeout period (t
whenever RESET asserts or whenever WDI sees a rising or falling edge (Figure 2).
Battery-On Output (MAX16035/MAX16039). BATTON goes high during battery
backup mode.
Reset Input (MAX16036/MAX16040). When RESETIN falls below 1.235V, RESET
asserts. RESET remains asserted as long as RESETIN is low and for at least t
after RESETIN goes high.
Active-Low Power-Fail Output. PFO goes low when V
stays low until V
the reset threshold voltage.
Supply Voltage, 1.2V to 5.5V
Output. OUT sources from V
V
Backup Battery Input. When V
BATT if V
switches to V
slowly.
Chip-Enable Output. CEOUT goes low only when CEIN is low and reset is not
asserted. When CEOUT is disconnected from CEIN, CEOUT is actively pulled up to
OUT.
CC
or BATT when V
Low-Power Battery Backup
BATT
TH
CC
), the manual-reset input is low, or RESETIN is low. It asserts low in
is 40mV greater than V
PFI
. The 40mV hysteresis prevents repeated switching if V
RP
) after V
goes above 1.235V. PFO also goes low when V
CC
is below the reset threshold voltage.
CC
CC
rises above the reset threshold, after the manual-reset
CC
WD
when RESET is not asserted and from the greater of
falls below the reset threshold, OUT switches to
), the internal watchdog timer runs out and a reset
CC
FUNCTION
CC
.
PFI
. When V
falls below 1.235V.
RP
CC
). The internal watchdog clears
rises above V
PFI
CC
falls below 1.235V. PFO
Pin Description
is below the reset
BATT
CC
CC
falls below
, OUT
CC
if not used.
RP
falls
) after
RP
7

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