MAX793SESE Maxim Integrated Products, MAX793SESE Datasheet - Page 8

IC MPU SUPERVISORY CIRC 16SOIC

MAX793SESE

Manufacturer Part Number
MAX793SESE
Description
IC MPU SUPERVISORY CIRC 16SOIC
Manufacturer
Maxim Integrated Products
Type
Battery Backup Circuitr
Datasheet

Specifications of MAX793SESE

Number Of Voltages Monitored
1
Output
Open Drain, Push-Pull
Reset
Active High/Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
2.925V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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3.0V/3.3V Adjustable Microprocessor
Supervisory Circuits
The MAX793/MAX794/MAX795 are designed for 3.3V
and 3V systems, and provide a number of supervisory
functions (see the Selector Guide on the front page).
Figures 1 and 2 show the typical timing relationships of
the various outputs during power-up and power-down
with typical V
Many microprocessor-based products require manual-
reset capability, allowing the operator, a test technician,
or external logic circuitry to initiate a reset. On the
MAX793/MAX794, a logic low on MR asserts reset. Reset
remains asserted while MR is low, and for t
after it returns high. During the first half of the reset time-
Figure 1. Timing Diagram, V
8
_______________Detailed Description
_______________________________________________________________________________________
Manual Reset Input (MAX793/MAX794)
V
V
V
V
V
V
(MAX793/MAX794)
V
(MAX793)
PFO
(MAX793/MAX794)
BATT ON
SHOWN FOR V
TYPICAL PROPAGATION DELAYS REFLECT A 40mV OVERDRIVE.
MAX794: V
RESET
CC
LOWLINE
RESET
CE OUT
WDO
BOK
(MAX793/MAX794)
(PULLED UP TO V
CC
(MAX793/MAX794)
RESET IN
General Timing Characteristics
rise and fall times.
CC
= 0V to 3.3V, V
= V
CC
CC
(V
)
CC
RST IN
BATT
Rising
V
/ V
BATT
= 3.6V, CE IN = GND.
RST
)
RP
V
SW
(200ms)
25µs
25µs
25µs
V
RST
V
LL
out period (t
nally forced low to facilitate enabling the battery fresh-
ness seal. MR has an internal 70µA pullup current, so it
can be left open if it is not used. This input can be driven
with TTL- or CMOS-logic levels, or with open-drain/collec-
tor outputs. Connect a normally open momentary switch
from MR to GND to create a manual-reset function; exter-
nal debounce circuitry is not required. If MR is driven
from long cables or the device is used in a noisy environ-
ment, connect a 0.1µF capacitor from MR to ground to
provide additional noise immunity.
A microprocessor’s (µP’s) reset input starts the µP in a
known state. These MAX793/MAX794/MAX795 µP
supervisory circuits assert a reset to prevent code exe-
cution errors during power-up, power-down, and
25µs
5µs
t
t
RP
RP
/
/
2
2
RP
), the state of MR is ignored if PFO is exter-
t
t
RP
RP
(PFO FOLLOWS PFI)
Reset Outputs

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