CAT1021WI-30-GT3 ON Semiconductor, CAT1021WI-30-GT3 Datasheet - Page 12

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CAT1021WI-30-GT3

Manufacturer Part Number
CAT1021WI-30-GT3
Description
IC SUPERVISR CPU 2K EEPROM 8SOIC
Manufacturer
ON Semiconductor
Type
Simple Reset/Power-On Resetr
Datasheet

Specifications of CAT1021WI-30-GT3

Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active High/Active Low
Reset Timeout
130 ms Minimum
Voltage - Threshold
3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT1021WI-30-GT3
Manufacturer:
ON Semiconductor
Quantity:
20 000
Part Number:
CAT1021WI-30-GT3
Manufacturer:
CSI
Quantity:
20 000
CAT1021, CAT1022, CAT1023
Acknowledge Polling
Disabling of the inputs can be used to take
advantage of the typical write cycle time. Once the
stop condition is issued to indicate the end of the
host’s write opration, the CAT1021/22/23 initiates
the internal write cycle. ACK polling can be initiated
immediately. This involves issuing the start condition
followed by the slave address for a write operation. If
the device is still busy with the write operation, no
ACK will be returned. If a write operation has
completed, an ACK will be returned and the host can
then proceed with the next read or write operation.
WRITE PROTECTION PIN (WP)
The Write Protection feature (CAT1021 only) allows
the user to protect against inadvertent memory array
programming. If the WP pin is tied to V
memory array is protected and becomes read only.
The CAT1021 will accept both slave and byte addre-
sses, but the memory location accessed is protected
from programming by the device’s failure to send an
acknowledge after the first byte of data is received.
Figure 10. Immediate Address Read Timing
Doc. No. MD-3009 Rev. P
SDA
SCL
BUS ACTIVIT Y:
SDA LINE
MASTER
DATA OUT
8TH BI T
CC
8
, the entire
S
S
T
A
R
T
ADDRESS
SLAVE
12
READ OPERATIONS
The READ operation for the CAT1021/22/23 is initiated in
the same manner as the write operation with one
exception, the R/W ¯ ¯ bit is set to one. Three different READ
operations are possible: Immediate/Current Address
READ, Selective/Random READ and Sequential READ.
9
A
C
K
NO ACK
DATA
N
O
C
A
K
P
O
S
T
P
Characteristics subject to change without notice
STOP
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