LT3021ES8#PBF Linear Technology, LT3021ES8#PBF Datasheet - Page 9

IC REG LDO ADJ 500MA 8-SOIC

LT3021ES8#PBF

Manufacturer Part Number
LT3021ES8#PBF
Description
IC REG LDO ADJ 500MA 8-SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LT3021ES8#PBF

Regulator Topology
Positive Adjustable
Voltage - Output
0.2 ~ 9.5 V
Voltage - Input
0.9 ~ 10 V
Voltage - Dropout (typical)
0.155V @ 500mA
Number Of Regulators
1
Current - Output
500mA
Current - Limit (min)
550mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIN FUNCTIONS
OUT (Pins 3, 4/Pin 2): These pins supply power to the load.
Use a minimum output capacitor of 3.3μF to prevent oscil-
lations. Applications with large load transients require larger
output capacitors to limit peak voltage transients. See the
Applications Information section for more information on
output capacitance and reverse output characteristics.
SENSE (Pin 7/Pin 3, Fixed Voltage Device Only): This pin
is the sense point for the internal resistor divider. It should
be tied directly to the OUT pins for best results.
ADJ (Pin 7/Pin 3): This pin is the inverting terminal to the
error amplifi er. Its typical input bias current of 20nA fl ows
out of the pin (see curve of ADJ Pin Bias Current vs Tem-
perature in the Typical Performance Characteristics). The
ADJ pin reference voltage is 200mV (referred to GND).
AGND (Pin 8/Pin 4): Ground.
PGND (Pins 10, 17/Pin 6): Ground.
SHDN (Pin 9/Pin 5): The SHDN pin puts the LT3021 into
a low power state. Pulling the SHDN pin low turns the
output off. Drive the SHDN pin with either logic or an open
collector/drain device with a pull-up resistor. The pull-up
resistor supplies the pull-up current to the open collector/
BLOCK DIAGRAM
SHDN
(9/5)
NOTE:
FOR LT3021 ADJUST PIN (7/3) IS CONNECTED TO
THE ADJUST PIN, R1 AND R2 ARE EXTERNAL.
FOR LT3021-1.X PIN (7/3) IS CONNECTED TO THE
OUTPUT SENSE PIN, R1 AND R2 ARE INTERNAL.
BIAS CURRENT
GENERATOR
REFERENCE
AND
SHUTDOWN
(DH Package/S8 Package)
200mV
212mV
(DH Package/S8 Package)
+
RECOVERY
+
ERROR AMP
NO-LOAD
SHUTDOWN
THERMAL
FIXED
V
1.2V
1.5V
1.8V
OUT
drain logic, normally several microamperes, and the SHDN
pin current, typically 2.5μA. If unused, connect the SHDN
pin to V
is not connected.
IN (Pins 12, 14/Pin 8): These pins supply power to the
device. The LT3021 requires a bypass capacitor at IN if
it is more than six inches away from the main input fi lter
capacitor. The output impedance of a battery rises with
frequency, so include a bypass capacitor in battery-pow-
ered circuits. A bypass capacitor in the range of 3.3μF to
10μF suffi ces. The LT3021 withstands reverse voltages
on the IN pin with respect to ground and the OUT pin. In
the case of a reversed input, which occurs if a battery is
plugged in backwards, the LT3021 acts as if a diode is
in series with its input. No reverse current fl ows into the
LT3021 and no reverse voltage appears at the load. The
device protects itself and the load.
EXPOSED PAD (Pin 17, DH16 Package Only): Ground.
Solder Pin 17 to the PCB ground. Connect directly to Pins
8, 10 for best performance.
NC (Pins 1, 2, 5, 6, 11, 13, 15, 16/Pins 1, 7): No Connect.
No connect pins may be fl oated, tied to IN or tied to GND.
CURRENT
25k
GAIN
20k
20k
20k
R1
100k
130k
160k
R2
IN
. The LT3021 does not function if the SHDN pin
LT3021-1.5/LT3021-1.8
Q1
Q2
R3
D1
LT3021/LT3021-1.2/
D2
Q3
R2
R1
3021
BD
ADJ
(7/3)
IN
(12, 14/8)
OUT
(3,4/2)
OUT SENSE
(7/3)
GND
(8,10,17/4,6)
3021fc
9

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