LT1963ES8 Linear Technology, LT1963ES8 Datasheet - Page 4

IC REG LDO ADJ 1.5A LN 8SOIC

LT1963ES8

Manufacturer Part Number
LT1963ES8
Description
IC REG LDO ADJ 1.5A LN 8SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LT1963ES8

Regulator Topology
Positive Adjustable
Voltage - Output
1.21 ~ 20 V
Voltage - Input
2.1 ~ 20 V
Voltage - Dropout (typical)
0.34V @ 1.5A
Number Of Regulators
1
Current - Output
1.5A
Current - Limit (min)
1.6A
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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The
PARAMETER
Current Limit
Input Reverse Leakage Current (Note 13) Q, T, S8 Packages V
Reverse Output Current (Note 11)
LT1963 Series
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Absolute maximum input to output differential voltage can not be
achieved with all combinations of rated IN pin and OUT pin voltages. With
the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT can not exceed ±20V.
Note 3: The LT1963 regulators are tested and specified under pulse load
conditions such that T
T
characterization and correlation with statistical process controls.
Note 4: The LT1963 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: To satisfy requirements for minimum input voltage, the LT1963
(adjustable version) is tested and specified for these conditions with an
4
A
= 25°C. Performance at – 40°C and 125°C is assured by design,
denotes specifications which apply over the full operating temperature range, otherwise specifications are T
J
≈ T
A
. The LT1963 is 100% tested at
CONDITIONS
V
V
ST Package
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
LT1963 (Note 4) V
IN
IN
= 7V, V
= V
OUT(NOMINAL)
OUT
= 0V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
+ 1V, ∆V
IN
V
= – 20V, V
IN
= 1.5V, V
= 1.8V, V
= 2.5V, V
= 3.3V, V
= 1.21V, V
= – 20V, V
OUT
IN
IN
IN
IN
OUT
= – 0.1V
IN
< 1.5V
< 1.8V
< 2.5V
< 3.3V
OUT
< 1.21V
external resistor divider (two 4.12k resistors) for an output voltage of
2.4V. The external resistor divider will add a 300µA DC load on the output.
Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V
Note 8: GND pin current is tested with V
current source load. The GND pin current will decrease at higher input
voltages.
Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 12. For the LT1963, LT1963-1.5 and LT1963-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions.
Note 13. For the ST package, the input reverse leakage current increases
due to the additional reverse leakage current for the SHDN pin, which is
tied internally to the IN pin.
= 0V
= 0V
IN
MIN
– V
1.6
DROPOUT
IN
= V
TYP
OUT(NOMINAL)
600
600
600
600
300
.
2
A
= 25°C. (Note 3)
1200
1200
1200
1200
MAX
600
1
2
+ 1V and a
UNITS
1963fc
mA
mA
µA
µA
µA
µA
µA
A
A

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