BD3572HFP-TR Rohm Semiconductor, BD3572HFP-TR Datasheet - Page 6

• Manufacturer Part Number: BD3572HFP-TR
• Description: IC REG LDO VAR 500MA HRP5
• Manufacturer: Rohm Semiconductor

Specifications of BD3572HFP-TR

• Regulator Topology: Positive Adjustable
• Voltage - Output: 2.8 ~ 12 V
• Voltage - Input: 4.5 ~ 36 V
• Voltage - Dropout (typical): 0.25V @ 200mA
• Number Of Regulators: 1
• Current - Output: 500mA (Max)
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: HRP-5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Limit (min): -

●Peripheral Settings for Pins and Precautions
●Operation Notes
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1) V
2) Capacitors for stopping oscillation for output pins
1) Absolute maximum ratings
2) GND potential
3) Setting of heat
4) Pin short and mistake fitting
5) Actions in strong magnetic field
6) Testing on application boards
7) This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
PN junction is formed by the P layer and the N layer of each element, and a variety of parasitic elements will be
constituted.
For example, when a resistor and transistor are connected to pins as shown in Fig. 19,
Insert capacitors with a capacitance of 0.33μF to 1000μF between the V
The capacitance varies with the application. Be sure to design the capacitance with a sufficient margin.
Capacitors for stopping oscillation must be placed between each output pin and the GND pin. Use a capacitor within a
capacitance range between 0.1μF and 1000μF. Since oscillation does not occur even for ESR values from 0.001Ω to
100Ω, a ceramic capacitor can be used. Abrupt input voltage and load fluctuations can affect output voltages. Output
capacitor capacitance values should be determined after sufficient testing of the actual application.
result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when
such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a
special mode where the absolute maximum ratings may be exceeded is anticipated.
Ensure a minimum GND pin potential in all operating conditions.
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by the
presence of a foreign object may result in damage to the IC.
Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Be sure to turn power off when mounting or dismounting jigs at
the inspection stage. Furthermore, for countermeasures against static electricity, ground the equipment at the assembling
stage and pay utmost attention at the time of transportation or storing the product.
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may
CC
pins
 the P/N junction functions as a parasitic diode when GND>Pin A for the resistor or GND>Pin B for the transistor
 Similarly, when GND＞Pin B for the transistor (NPN), the parasitic diode described above combines with the N
(NPN).
layer of other adjacent elements to operate as a parasitic NPN transistor.
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CC
and GND pins.
Technical Note
2011.03 - Rev.B