LX8117-25CDT Microsemi Analog Mixed Signal Group, LX8117-25CDT Datasheet - Page 8

• Manufacturer Part Number: LX8117-25CDT
• Description: IC REG LDO POS 0.8A 2.5V DPAK
• Manufacturer: Microsemi Analog Mixed Signal Group

Specifications of LX8117-25CDT

• Regulator Topology: Positive Fixed
• Voltage - Output: 2.5V
• Voltage - Input: Up to 12V
• Voltage - Dropout (typical): 1.05V @ 800mA
• Number Of Regulators: 1
• Current - Limit (min): 800mA
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: TO-252-2, DPak (2 Leads + Tab), TO-252AA, SC-63
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -

8
LX8117-xx/8117A-xx/8117B-xx
LOAD REGULATION (continued)
Even when the circuit is optimally configured, parasitic resistance
can be a significant source of error. A 100 mil (2.54 mm) wide PC
trace built from 1 oz. copper-clad circuit board material has a
parasitic resistance of about 5 milliohms per inch of its length at
room temperature. If a 3-terminal regulator used to supply 2.50 volts
is connected by 2 inches of this trace to a load which draws 5 amps
of current, a 50 millivolt drop will appear between the regulator and
the load. Even when the regulator output voltage is precisely
2.50 volts, the load will only see 2.45 volts, which is a 2% error. It
is important to keep the connection between the regulator output
pin and the load as short as possible, and to use wide traces or
heavy-gauge wire.
should be located near the reglator package. If several capacitors
are used in parallel to construct the power system output capaci-
tance, any capacitors beyond the minimum needed to meet the
specified requirements of the regulator should be located near the
sections of the load that require rapidly-changing amounts of
current. Placing capacitors near the sources of load transients will
help ensure that power system transient response is not impaired
by the effects of trace impedance.
the input side of the regulator, especially between the input
capacitors and the regulator. Input capacitor ESR must be small
enough that the voltage at the input pin does not drop below V
during transients.
THERMAL CONSIDERATIONS
The LX8117 regulators have internal power and thermal limiting
circuitry designed to protect each device under overload conditions.
For continuous normal load conditions, however, maximum junc-
tion temperature ratings must not be exceeded. It is important to
give careful consideration to all sources of thermal resistance from
junction to ambient. This includes junction to case, case to heat sink
interface, and heat sink thermal resistance itself.
The minimum specified output capacitance for the regulator
To maintain good load regulation, wide traces should be used on
V
where: V
IN (MIN)
= V
V
V
IN (MIN)
OUT
DROPOUT (MAX)
OUT
+ V
DROPOUT (MAX)
the lowest allowable instantaneous
voltage at the input pin.
the designed output voltage for the
power supply system.
the specified dropout voltage
for the installed regulator.
0.8, 1 & 1.2A L
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
P
R O D U C T I O N
A P P L I C A T I O N N O T E S
O W
D
R O P O U T
IN (MIN)
D
THERMAL CONSIDERATIONS (continued)
Example
heat sink:
1 oz. copper circuit-board trace material. The following equation
describes the observed relationship between the area of a square
copper pad, and the thermal resistance from the tab of a SOT-223
package soldered at the center of the pad to ambient.
square pad with area:
within specified limits.
Solution: The junction temperature is:
P
A T A
First, find the maximum allowable thermal resistance of the
A test was conducted to determine the thermal characteristics of
Substituting the value for R
will be required to maintain the LX8117 junction temperature
where: P
Given: V
O S I T I V E
Find: The size of a square area of 1oz. copper circuit-
Area
S
I
R
board trace-foil that will serve as a heatsink,
adequate to maintain the junction temperature of the
LX8117 in the ST (SOT-223) package within
specified limits.
T
R
R
R
T
P
P
R
Area
SINK
OUT
J
D
S
D
D
IN
JT
JT
TS
SA
SA
H E E T
= P
R
= 5.0V ±5%, V
= 0.43 in
= 15°C/W, R
= 0.5A, T
SINK
=
= 1.4W
=
E G U L AT O R S
D
T
Dissipated power.
Thermal resistance from the junction to the
mounting tab of the package.
Thermal resistance through the interface
between the IC and the surface on which
it is mounted.
Thermal resistance from the mounting surface
of the heatsink to ambient.
Heat sink temperature.
[
J
T
(R
[V
=
J
P
IN
- T
JT
R
D
R
* (1 + Tol
+ R
JT
A
SA
2
A
3.1°C/W
(0.66" x 0.66"), 280mm
= 55°C, T
- (R
- 22.3°C/W
T
CS
C
TS
OUT
+ R
R
SA
= 5°C/W
JT
CS
VIN
+ R
= 2.5V ±3%
calculated above, we find that a
SA
)] - [V
T
) + T
J
S
TS
= 125°C
) ,
R
in
OUT
SA
A
2
T
* (1 - Tol
R
A
SA
= 29.6°C/W
2
(17 x 17 mm)
VOUT
Copyright © 1999
)]
Rev. 1.5a
]
* I
OUT