LP5951MGX-2.8/NOPB National Semiconductor, LP5951MGX-2.8/NOPB Datasheet - Page 10

• Manufacturer Part Number: LP5951MGX-2.8/NOPB
• Description: IC REG LDO 150MA 2.8V SC70-5
• Manufacturer: National Semiconductor

Specifications of LP5951MGX-2.8/NOPB

• Regulator Topology: Positive Fixed
• Voltage - Output: 2.8V
• Voltage - Input: Up to 5.5V
• Number Of Regulators: 1
• Current - Output: 150mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
• For Use With: LP5951MF-2.5EV - BOARD EVALUATION LP5951MF-2.5LP5951MF-1.8EV - BOARD EVALUATION LP5951MF-1.8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Dropout (typical): -
• Current - Limit (min): -
• Other names: LP5951MGX-2.8

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The ceramic capacitor’s capacitance can vary with tempera-
ture. The capacitor type X7R, which operates over a temper-
ature range of -55°C to +125°C, will only vary the capacitance
to within ±15%. The capacitor type X5R has a similar toler-
ance over a reduced temperature range of -55°C to +85°C.
Many large value ceramic capacitors, larger than 1µF are
manufactured with Z5U or Y5V temperature characteristics.
Their capacitance can drop by more than 50% as the tem-
perature varies from 25°C to 85°C. Therefore X7R is recom-
mended over Z5U and Y5V in applications where the ambient
temperature will change significantly above or below 25°C.
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
1µF to 4.7µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum capac-
itor with an ESR value within the stable range, it would have
to be larger in capacitance (which means bigger and more
costly) than a ceramic capacitor with the same ESR value. It
should also be noted that the ESR of a typical tantalum will
increase about 2:1 as the temperature goes from 25°C down
to -40°C, so some guard band must be allowed.
NO-LOAD STABILITY
The LP5951 will remain stable and in regulation with no ex-
ternal load. This is an important consideration in some cir-
cuits, for example CMOS RAM keep-alive applications.
ENABLE OPERATION
The LP5951 may be switched ON or OFF by a logic input at
the Enable pin, V
on. When the enable pin is low, the regulator output is off and
the device typically consumes 5nA.
If the application does not require the Enable switching fea-
ture, the V
output permanently on.
To ensure proper operation, the signal source used to drive
the V
specified turn-on/off voltage thresholds listed in the Electrical
Characteristics section under Enable Control Characteristics,
V
FAST TURN OFF AND ON
The controlled switch-off feature of the device provides a fast
turn off by discharging the output capacitor via an internal FET
device. This discharge is current limited by the RDSon of this
switch.
SUGGESTED CAPACITORS AND THEIR SUPPLIERS
IL
and V
Capacitance / µF
EN
input must be able to swing above and below the
IH
EN
.
1.0
1.0
pin should be tied to V
EN
. A logic high at this pin will turn the device
C1608X5R1A105K
C1005X5R1A105K
IN
to keep the regulator
Model
Vendor
TDK
TDK
10
Fast turn-on is guaranteed by an optimized architecture al-
lowing a very fast ramp of the output voltage to reach the
target voltage.
SHORT-CIRCUIT PROTECTION
The LP5951 is short circuit protected and in the event of a
peak over-current condition, the output current through the
PMOS will be limited.
If the over-current condition exists for a longer time, the av-
erage power dissipation will increase depending on the input
to output voltage difference until the thermal shutdown cir-
cuitry will turn off the PMOS.
Please refer to the section on thermal information for power
dissipation calculations.
THERMAL-OVERLOAD PROTECTION
Thermal-Overload Protection limits the total power dissipation
in the LP5951. When the junction temperature exceeds T
160°C typ., the shutdown logic is triggered and the PMOS is
turned off, allowing the device to cool down. After the junction
temperature dropped by 20°C (temperature hysteresis), the
PMOS is activated again. This results in a pulsed output volt-
age during continuous thermal-overload conditions.
The Thermal-Overload Protection is designed to protect the
LP5951 in the event of a fault condition. For normal, continu-
ous operation, do not exceed the absolute maximum junction
temperature rating of T
Ratings).
REVERSE CURRENT PATH
The internal PFET pass device in LP5951 has an inherent
parasitic body diode. During normal operation, the input volt-
age is higher than the output voltage and the parasitic diode
is reverse biased. However, if the output is pulled above the
input in an application, then current flows from the output to
the input as the parasitic diode gets forward biased. The out-
put can be pulled above the input as long as the current in the
parasitic diode is limited to 50mA.
For currents above this limit an external Schottky diode must
be connected from V
V
EVALUATION BOARDS
For availability of evaluation boards please refer to the Prod-
uct Folder of LP5951 at www.national.com. For information
regarding evaluation boards, please refer to Application Note:
AN-1486.
OUT
).
Ceramic, X5R
Ceramic, X5R
Type
OUT
J
= +150°C (see Absolute Maximum
to V
IN
(cathode on V
Case Size / Inch (mm)
0603 (1608)
0402 (1005)
IN
, anode on
J
=